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參數(shù)資料
| 型號： | TTSI2K32T |
| 英文描述： | 2048-Channel, 32-Highway Time-Slot Interchanger |
| 中文描述： | 2048通道，32道時隙交換器 |
| 文件頁數(shù)： | 24/66頁 |
| 文件大小： | 1321K |
| 代理商： | TTSI2K32T |
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TTSI2K32T
2048-Channel, 32-Highway Time-Slot Interchanger
Preliminary Data Sheet
February 1999
24
Lucent Technologies Inc.
TDM Highway Offsets
(continued)
One can also see that bit 0 of the transmit time slot 0 is driven four CK cycles after FSYNC is sampled active. Since
CK is set for 8.192 MHz and TXD0 is set for 2.048 Mbits/s, then four CK cycles equals one 2.048 Mbits/s bit period.
5-7062(F)r.2
Figure 12. Highway Offsets
Reset Sequence
The reset sequence of the TTSI2K32T is related to the PLL operation. In order for the chip to be properly reset, the
PLL must have already established a lock on the CK input signal. That event will occur 250
μ
s after the CK input is
functioning. After the PLL is locked onto the input clock, the TTSI2K32T will be in a reset state within 200 ns. This
results in a reset time of 250.2
μ
s. Subsequent resets will take 200 ns, provided CK is not interrupted.
RESET is an asynchronous signal and requires no setup or hold margins relative to any other input clock or signal.
After a reset, BIST must be run on the TTSI2K32T to bring all the memories in the device to a known state. This is
required for correct operation of the chip. See the description below Table 17, BIST Command Register (0x02), on
page 39, on how to run BIST.
TIME SLOT 63, BIT 7
TIME SLOT 0, BIT 0
TIME SLOT 0, BIT 1
TIME SLOT 31, BIT 6
TIME SLOT 31, BIT 7
TIME SLOT 0, BIT 0
FSYNC
CK—8.192 MHz
RXD0—4.096 Mbits/s
(3/4-bit OFFSET)
TXD0—2.048 Mbits/s
(1-bit OFFSET)
FSYNC SAMPLED ACTIVE
Rx TIME SLOT 0 BIT 0 SAMPLE POINT
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PDF描述 |
|---|---|
| TTSI2K32T3BAL | 2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI2K32T | 2048-Channel, 32-Highway Time-Slot Interchanger(2048通道、32路干線時隙交換機) |
| TTSI4K32T | 4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T3BAL | 4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T | 4096-Channel, 32-Highway Time-Slot Interchanger(4096通道、32路干線時隙交換機) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TTSI2K32T3BAL | 制造商:AGERE 制造商全稱:AGERE 功能描述:2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T | 制造商:AGERE 制造商全稱:AGERE 功能描述:4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T3BAL | 制造商:AGERE 制造商全稱:AGERE 功能描述:4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSL-1 | 功能描述:電線鑒定 THERM. TRANS. SELFLAM LABEL RoHS:否 制造商:TE Connectivity / Q-Cees 產品:Labels and Signs 類型: 材料:Vinyl 顏色:Blue 寬度:0.625 in 長度:1 in |
| TTSL10VC3-5 | 功能描述:電線鑒定 ThermTrans, Self-Lam Label, Vinyl, .50" RoHS:否 制造商:TE Connectivity / Q-Cees 產品:Labels and Signs 類型: 材料:Vinyl 顏色:Blue 寬度:0.625 in 長度:1 in |
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