參數(shù)資料
型號(hào): TSW5071N
廠商: 意法半導(dǎo)體
元件分類: Codec
英文描述: PROGRAMMABLE CODEC/FILTER COMBO 2ND GENERATION
中文描述: 可編程解碼器/濾鏡組合第二代
文件頁數(shù): 12/32頁
文件大小: 284K
代理商: TSW5071N
HYBRID BALANCEFILTER
The Hybrid Balance Filter on COMBO IIG is a
programmable filter consisting of a second-order
Bi-Quad section, Hybal1, followed by a first-order
section, Hybal2, and a programmable attenuator.
Either of the filter sections can be bypassed if
only one is required to achieve good cancellation.
A selectable 180 degree inverting stage is in-
cluded to compensate for interface circuits which
also invert the transmit input relative to the re-
ceive output signal. The Bi-Quad is intended
mainly to balance low frequency signals across a
transformer SLIC, and the first order section to
balance midrange to higher audio frequency sig-
nals. The attenuatorcan be programmed to com-
pensate for VF
R
O to VF
X
I echos in the range
of -2.5 to – 8.5 dB.
As a Bi-Quad, Hybal1 has a pair of low frequency
zeroes and a pair of complex conjugate poles.
When configuring the Bi-Quad, matching the
phase of the hybrid at low to midbandfrequencies
is most critical. Once the echo path is correctly
balanced in phase, the magnitudeof the cancella-
tion signal can be corrected by the programmable
attenuator.
The Bi-Quad mode of Hybal1 is most suitable for
balancinginterfaceswith transformershavinghigh
inductance of 1.5 Henries or more. An alternative
configuration for smaller transformers is available
byconvertingHybal1to a simplefirst-ordersection
witha singlereallowfrequencypoleand0 Hzzero.
In this mode, the pole/zerofrequencymay be pro-
grammed.
Many line interfaces can be adequately balanced
by use of the Hybal1 section only, in which case
the Hybal2 filter should be de-selected to bypass
it.
Hybal2, the higher frequencyfirst-order section, is
provided for balancing an electronic SLIC, and is
also helpful with a transformer SLIC in providing
additionalphase correction for mid and high-band
frequencies, typically 1 kHz to 3.4 kHz. Such a
correction is particularly useful if the test balance
impedanceincludes a capacitorof 100 nF or less,
such as the loaded and non-loaded loop test net-
works in the United States. Independent place-
ment of the pole and zero location is provided.
Bit
State
Function
7
0
Disable Hybrid Balance Circuit Completely.
No internal cancellation is provided.
1
Enable Hybrid Balance Cancellation Path
6
0
Phase of the internal cancellation signal assumes inverted phase of the echo
path from VF
R
O to VF
X
I.
1
Phase of the internal cancellation signal assumes no phase inversion in the line
interface.
5
0
Bypass Hybal 2Filter Section
1
Enable Hybal 2 Filter Section
G4–G0
Attenuation Adjustment for the Magnitude of the CancellationSignal. Range is
– 2.5 dB (00000) to – 8.5 dB (11000)
Table 9:
HybridBalanceRegister1 Byte2 Instruction.
Notes:
1. Maximum level into 300
; 2.Maximum level into 600
;
3. R
L
15K
(*) State at power on initialization
(*) State at power on initialization
Setting= Please refer tosoftware TS5077 2
Bit Number
0dBm0 Test Leve at VF
R
0
In dBm (Into 600
)
No Output
7
6
5
4
3
2
1
0
In Vrms (approx.)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
– 17.3
– 17.2
0.106
0.107
1
0
1
0
1
1
1
0
0
0.775
1
1
1
1
0
0
1
1
+ 6.9 (note 1)
1.71
1
1
1
1
1
0
1
0
+ 7.6 (note 2)
1.86
1
1
1
1
1
1
1
1
+ 8.1 (note 3)
1.07
Table 8:
Byte2 of ReceiveGain Instructions.
TS5070 - TS5071
12/32
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