參數(shù)資料
型號： TSS463C
廠商： Atmel Corp.
英文描述： VAN Data Link Controller with Serial Interface
中文描述： 凡數(shù)據(jù)與串行接口鏈路控制器
文件頁數(shù)： 11/59頁
文件大?。?/td> 492K
代理商： TSS463C
11
TSS463C
7601B–AUTO–02/06
Figure 8.
SCI Speed Considerations
Interrupts
If an event occurs in the TSS463C that needs the attention of the processor, this will be
signalled on the active low, open drain interrupt request pin. The event that creates this
request is controlled by the internal registers.
Every time the microprocessor accesses any of the interrupt registers (addresses 0x08
to 0x0B), the INT pin will be released momentarily. This enables the TSS463C to work
with processors that have either edge or level sensitive interrupt inputs.
Reset
The reset is applied asynchronously or synchronously to the XTAL clock.
Asynchronous Reset
It can be done either by the RESET pin (hardware asynchronous reset) or by software
(software asynchronous reset).
The RESET pin is a CMOS trigger input with a pull-up resistor (~ 70 k
Ω
). An external
1
μ
F capacitor to GND provides to RESET pin an efficient behavior.
The asynchronous software reset is made by the ’Initialization Sequence’described in
“Motorola SPI Mode” on page 5.
Two ’0x00’bytes provide an asynchronous software reset and configure the TSS463C in
the Motorola SPI mode while two ’0xFF’bytes provide a reset and configure the compo-
nent in the Intel SPI mode and ’0x00 followed by 0xFF ’provide a reset and configure the
component in the SCI mode. The SS pin must be asserted as shown on Figure 9. The
SPI/SCI logic will monitor these two bytes and provide an internal reset pulse asserting
the TSS463C in the right mode.
Synchronous Reset
A synchronous reset (regarding XTAL clock) is available on the TSS463C during current
operation. It is made through the GRES command bit of the Command Register
(address 0x03).
The two kinds of reset are ordered and filtered. Then the internal reset, always asserted
asynchronously, enables the internal oscillator. Then it waits for 12 clock periods and
the oscillator stability.
The different blocks of the TSS463C need to be turned on synchronously. So the
release of the internal reset is synchronous and a loose of clock can let the TSS463C in
permanent reset after applying Reset.
It is important to note that even after a reset on the RESET pin, the user should wait for
12 clock periods before sending the ’Initialization Sequence’in order to select the SPI or
SCI mode (because the default mode after a hardware reset is the Motorola SPI mode).
Data
Control
Address
12 Xtal Min
(12s at 1 MHz)
(8 s at 1 MHz)
(4 s at 1 MHz)
15 Xtal Min
(15 s at 1 MHz)
SS
SCLK
MOSI
Start Bit
Stop Bit
125 Kbits/s Max for SCLK
8 Xtal Min
4 Xtal Min
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TSS463C-TERA-9 功能描述:網(wǎng)絡(luò)控制器與處理器 IC ASICS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
TSS463C-TERZ-9 制造商:Atmel Corporation 功能描述:
TSS463C-TESZ-9 功能描述:網(wǎng)絡(luò)控制器與處理器 IC ASICS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
TSS463D 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Industrial Control IC
TSS463R 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Industrial Control IC
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