參數(shù)資料
型號: TSS463A-TERZ
廠商: Atmel Corp.
英文描述: VAN Data Link Controller with Serial Interface
中文描述: 凡數(shù)據(jù)與串行接口鏈路控制器
文件頁數(shù): 1/60頁
文件大?。?/td> 816K
代理商: TSS463A-TERZ
1
4205B–AUTO–12/04
Features
Fully Compliant to VAN Specification ISO/11519-3
Handles All Specified Module Types
Handles All Specified Message Types
Handles Retransmission of Frames on Contention and Errors
3 Separate Line Inputs with Automatic Diagnosis and Selection
Normal or Pulsed (Optical and Radio Mode) Coding
VAN Transfer Rate: 1 Mbit/s Maximum
SPI/SCI Interface
– SPI Transfer Rate: 4 Mbit/s Maximum
– SCI Transfer Rate: 125 Kbit/s Maximum
Idle and Sleep Modes
128 Bytes of General-purpose RAM
14 Identifier Registers with All Bits Individually Maskable
6-source Maskable Interrupt, Including an Interrupt-on-reset to Detect Glitches on the
Reset Pin
Integrated Crystal or Resonator Oscillator with Internal Baud Rate Generator and
Buffered Clock Output
Single +5V Power Supply
0.8
μ
m CMOS Technology
SO16 Package
Description
The TSS463AA is a circuit that allows the transfer of all the status information needed
in a car or truck over a single low-cost wire pair, that minimizes electrical wire usage. It
can be used to interconnect powerful functions to control and interface car body elec-
tronics (lights, wipers, power window, etc.).
The TSS463AA is fully compliant with the VAN ISO Standard 11519-3. This standard
supports a wide range of applications such as low-cost remote-controlled switches.
Typically it is used for lamp control, complex, highly-autonomous, distributed systems,
which require fast and secure data transfers.
The TSS463AA is a microprocessor-interfaced line controller for mid- to high-com-
plexity bus-masters and listeners like dashboard controllers, car stereo or mobile
telephone CPUs.
The microprocessor interface consists of a 256-byte RAM and a register area divided
into 11 control registers, 14 channel register sets and 128 bytes of general purpose
RAM, used as a message storage area, and a 6-source maskable interrupt.
The circuit operates in the RAM using DMA techniques, controlled by the channel and
control registers. This allows virtually any microprocessor, including SPI/SCI interface,
to be connected easily to the TSS463AA.
Messages are encoded in enhanced Manchester code, and an optional pulsed code
for use with an optical or radio link, at a maximum bit rate of 1 Mbit/s. The TSS463AA
analyzes the messages received or transmitted according to 6 different criteria includ-
ing some higher level checks.
In addition, the bus interface has three separate inputs with automatic source diagno-
sis and selection. The interface allows for multibus listening or the automatic selection
of the most reliable source at any time if several line receivers are connected to the
same bus.
VAN Data Link
Controller with
Serial Interface
TSS463-AA
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