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參數(shù)資料
| 型號： | TSS461F |
| 廠商： | Atmel Corp. |
| 英文描述： | VAN Data Link Controller |
| 中文描述： | 凡數(shù)據(jù)鏈路控制器 |
| 文件頁數(shù)： | 36/57頁 |
| 文件大?。?/td> | 397K |
| 代理商： | TSS461F |
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36
7615A–AUTO–02/06
TSS461F
ID_T [11:0]: Identifier
Tag
Upon a reception hit (i.e, a good comparison between the identifier received and an identifier
specified, taking the comparison mask into account, as well as a status and command indicating
a message to be received, the identifier tag bits value will be rewritten with the identifier bits
actually received.
EXT, RAK, RNW &
RTR: (See
section “Retries,
Rearbitrate and Abort”)
No comparison will be done on the command bits, except on EXT bit. The RAK, RNW and RTR
bits will be written into the first byte of the Message upon a reception hit.
The RNW and RTR bits, as well as the status bits in the length and status register, must be in a
valid position for reception or transmission. If not, the message corresponding to this identifier is
considered as inactive or invalid.
The way of knowing if an acknowledge sequence was requested or not is to check the first byte
of the Message.
Message Pointer
Register
The message pointer register at address (base_address + 0x02) is 8 bits wide. It indicates
where, in the Message DATA RAM area, the message buffer is located.
Read/Write register
DRAK: Disable RAK
(Used in 'Spy Mode')
In reception: whatever is the RAK bit of the incoming valid frame, no ACK answer will be set. If
the message was successfully received, an IT is set (ROK or RNOK).
In transmission: no action.
One: disable active, 'spy' mode.
Zero: disable inactive, normal operation.
M_P [6:0]: Message
Pointer
Since the Message DATA RAM area base address is 0x80, the value in this register is the offset
from that address. If the message buffer length value is illegal (i.e. zero), this register is rede-
fined as being a link pointer, thus containing the channel number of the channel that contains the
actual message pointer, message length and received status. However, the identifier, mask,
error and transmitted status used will be the originally matched channel. In any case, if a link is
intended, the three high bits of M_P [6:0] should be set to 0.
This allows several channels to use the same actual reception buffer in Message DATA RAM,
thus diminishing the memory usage.
Note that only 1 level of link is supported.
7
6
5
4
3
2
1
0
DRAK
M_P 6
M_P 5
M_P 4
M_P 3
M_P 2
M_P 1
M_P 0
base_address
+ 0x02
相關PDF資料 |
PDF描述 |
|---|---|
| TSS463-AAR | VAN Data Link Controller with Serial Interface |
| TSS463A-TERZ | VAN Data Link Controller with Serial Interface |
| TSS463C | VAN Data Link Controller with Serial Interface |
| TSS4B02G | Single Phase 4.0 Amps. Glass Passivated Super Fast Bridge Rectifiers |
| TSS4B03G | Single Phase 4.0 Amps. Glass Passivated Super Fast Bridge Rectifiers |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TSS461F-TDRZ-9 | 功能描述:網(wǎng)絡控制器與處理器 IC Van Data Link Controller RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| TSS461F-TDSZ-9 | 功能描述:網(wǎng)絡控制器與處理器 IC ASICS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| TSS463 | 制造商:Atmel Corporation 功能描述:LAN Node Controller, 16 Pin, SOP 制造商:Temic 功能描述:LAN Node Controller, 16 Pin, SOP |
| TSS463-AA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TSS463-AA [Updated 3/03. 60 Pages] |
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