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參數(shù)資料
| 型號： | TSS461C-TDRZ |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | VAN Data Link Controller |
| 中文描述： | 1 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PDSO24 |
| 封裝： | ROHS COMPLIANT, SO-24 |
| 文件頁數(shù)： | 36/57頁 |
| 文件大小： | 423K |
| 代理商： | TSS461C-TDRZ |
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36
TSS461C
4193G–AUTO–12/04
ID_T [11:0]: Identifier Tag
Upon a reception hit (i.e, a good comparison between the identifier received and an
identifier specified, taking the comparison mask into account, as well as a status and
command indicating a message to be received, the identifier tag bits value will be rewrit-
ten with the identifier bits actually received.
EXT, RAK, RNW & RTR: (See
Section “Retries, Rearbitrate
and Abort”)
No comparison will be done on the command bits, except on EXT bit. The RAK, RNW
and RTR bits will be written into the first byte of the Message upon a reception hit.
The RNW and RTR bits, as well as the status bits in the length and status register, must
be in a valid position for reception or transmission. If not, the message corresponding to
this identifier is considered as inactive or invalid.
The way of knowing if an acknowledge sequence was requested or not is to check the
first byte of the Message.
Message Pointer Register
The message pointer register at address (base_address + 0x02) is 8 bits wide. It indi-
cates where, in the Message DATA RAM area, the message buffer is located.
Read/Write register
DRAK: Disable RAK (Used in
'Spy Mode')
In reception: whatever is the RAK bit of the incoming valid frame, no ACK answer will be
set. If the message was successfully received, an IT is set (ROK or RNOK).
In transmission: no action.
One: disable active, 'spy' mode.
Zero: disable inactive, normal operation.
M_P [6:0]: Message Pointer
Since the Message DATA RAM area base address is 0x80, the value in this register is
the offset from that address. If the message buffer length value is illegal (i.e. zero), this
register is redefined as being a link pointer, thus containing the channel number of the
channel that contains the actual message pointer, message length and received status.
However, the identifier, mask, error and transmitted status used will be the originally
matched channel. In any case, if a link is intended, the three high bits of M_P [6:0]
should be set to 0.
This allows several channels to use the same actual reception buffer in Message DATA
RAM, thus diminishing the memory usage.
Note that only 1 level of link is supported.
7
6
5
4
3
2
1
0
DRAK
M_P 6
M_P 5
M_P 4
M_P 3
M_P 2
M_P 1
M_P 0
base_address
+ 0x02
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TSS461CD | LAN Node Controller |
| TSS461CR | LAN Node Controller |
| TSS463-AA | TSS463-AA [Updated 3/03. 60 Pages] |
| TSS463D | Industrial Control IC |
| TSS463R | Industrial Control IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSS461CVAN | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:Van Controller Serial Interface |
| TSS461E | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:VAN Data Link Controller |
| TSS461E_06 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:VAN Data Link Controller |
| TSS461E-TDRA-9 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:VAN Data Link Controller |
| TSS461E-TDRZ-9 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:VAN Data Link Controller |
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