參數(shù)資料
型號(hào)： TSS461C-TDRZ
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： VAN Data Link Controller
中文描述： 1 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PDSO24
封裝： ROHS COMPLIANT, SO-24
文件頁(yè)數(shù)： 11/57頁(yè)
文件大?。?/td> 423K
代理商： TSS461C-TDRZ
11
TSS461C
4193G–AUTO–12/04
VAN Protocol
Line Interface
There are three line inputs and one line output available on the TSS461C. The three
inputs are either programmed by software or automatically selected by a diagnosis
system.
The diagnosis system continuously monitors the data received through the three inputs,
and compares them and the selected bitrate. It then chooses the most reliable input
according to the results.
The data on the line is encoded according to the VAN standard ISO/11519-3. This
means that the TSS461C is using a two-level signal having a recessive (1) and a domi-
nant (0) state. Furthermore, due to the simple medium used, all data transmitted on the
bus is also received simultaneously.
Consequently, the VAN protocol is a CSMA/CD (Carrier Sense Multiple Access/Colli-
sion Detection) protocol, allowing for continuous bitwise arbitration of the bus, and non-
destructive (for the higher priority message) collision detection.
Figure 4.
CSMA/CD Arbitration
In addition to the VAN specification there is also a pulsed coding of the dominant and
recessive states. This mode is intended to be used with an optical or radio link. In this
mode, the dominant state for the transmitter is a low pulse, (2x prescaled clocks at the
beginning of the bit) and the recessive state is just a high level. When receiving in this
mode, it is not the state of the signal which is decoded, but the edges. Also, reception is
imposed on the RxD0 input, and the diagnosis system does not operate correctly.
In addition, in this mode there is an internal loopback in the circuit since optical trans-
ceivers are not able to receive the signal that they transmit.
Node a: TxD
Node a loses the arbitration
Node a releases the bus
Node b wins the arbitration
Node c loses the arbitration
Node c releases the bus
R
D
Node b: TxD
R
D
Node c: TxD
R
D
On Bus: DATA
R
D
Arbitration field
R: Recessive Level
D: Dominant Level
1
2
3
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