參數(shù)資料
型號(hào): TS68HC901CP5
廠商: 意法半導(dǎo)體
英文描述: HCMOS MULTI-FUNCTION PERIPHERAL
中文描述: HCMOS多功能外設(shè)
文件頁數(shù): 31/42頁
文件大?。?/td> 369K
代理商: TS68HC901CP5
AC ELECTRICAL CHARACTERISTICS
(continued)
(VCC= 5.0Vdc
±
5%, GND = 0Vdc, TA= 0
°
C to 70
°
C)
Number
Characteristic
Value
5MHz
Unit
4MHz
8MHz
Min.
Max.
450
Min.
Max.
450
Min.
Max.
200
30
(6)
Timer Output Low from Rising Edge of
CS or DS (A & B) (reset T
OUT
)
T
OUT
Valid from Internal Timeout
ns
31
(2)
2 t
CLK
+ 300
2 t
CLK
+ 300
2 t
CLK
+ 300
ns
32
33
34
35
36
Timer Clock Low Time
Timer Clock High Time
Timer Clock Cycle Time
RESETLow Time
Delay to Falling INTR from External
Interrupt Active Transition
Transmitter Internal Interrupt Delay
from Falling Edge of TC
Receiver Buffer Full Interrupt
Transition Delay from Rising Edge of
RC
Receiver Error Interrupt Transition
Delay from Falling Edge of RC
Serial in Set Up Time to Rising Edge
of RC (divide by one only)
Data Hold Time from Rising Edge of
RC
(divide by one only)
Serial Output Data Valid from Falling
Edge of TC (
÷
1)
Transmitter Clock Low Time
Transmitter Clock High Time
Transmitter Clock Cycle Time
Receiver Clock Low Time
Receiver Clock High Time
Receiver Clock Cycle Time
CS, IACK, DS Width Low
Serial Output Data Valid from Falling
Edge of TC (
÷
16)
110
110
250
2
90
90
200
1.8
55
55
125
1.5
ns
ns
ns
μ
s
ns
1000
1000
1000
380
380
250
37
550
550
350
ns
38
800
800
400
ns
39
800
800
400
ns
40
80
70
50
ns
41
350
325
100
ns
42
440
420
200
ns
43
44
45
46
47
48
49
(2)
50
500
500
1.05
500
500
1.05
450
450
0.95
450
450
0.95
250
250
0.55
250
250
0.55
ns
ns
μ
s
ns
ns
μ
s
80
490
80
370
80
250
T
CLK
ns
Notes :
2. T
CLK
refers to theclock applied to theMFP CLK input
pin. t
CLK
refers to the timer clock signal,regardless of
whetherthatsignalcomesfromtheXTAL1/XTAL2 crys-
tal clock inputs or theTAI or TBI timerinputs.
6. Spec.30 applies to timer outputs TAO and TBO only.
TS68HC901
31/42
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