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參數(shù)資料
| 型號(hào)： | TMS320FN |
| 廠(chǎng)商： | Texas Instruments, Inc. |
| 英文描述： | Adjustable 1.24-16V ±0.5% Tolerance, 0.05-20mA Shunt Regulator; Package: TO-92 (TO-226) 5.33mm Body Height; No of Pins: 3; Container: Tape and Reel; Qty per Container: 2000 |
| 中文描述： | 第二代數(shù)字信號(hào)處理器 |
| 文件頁(yè)數(shù)： | 102/123頁(yè) |
| 文件大?。?/td> | 1205K |
| 代理商： | TMS320FN |
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6.9.4
I2C Electrical Specification and Timing
6.9.5
Serial Peripheral Interface (SPI) Master Mode Timing
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
Table 6-31. I2C Timing
TEST CONDITIONS
MIN
MAX
400
UNIT
kHz
f
SCL
SCL clock frequency
I2C clock module frequency is between 7
MHz and 12 MHz and I2C prescaler and
clock divider registers are configured appro-
priately
v
il
V
ih
V
hys
V
ol
t
LOW
Low level input voltage
High level input voltage
Input hysteresis
Low level output voltage
Low period of SCL clock
0.3 V
DDIO
V
V
V
V
μ
s
0.7 V
DDIO
0.05 V
DDIO
3 mA sink current
I2C clock module frequency is between 7
MHz and 12 MHz and I2C prescaler and
clock divider registers are configured appro-
priately
I2C clock module frequency is between 7
MHz and 12 MHz and I2C prescaler and
clock divider registers are configured appro-
priately
0
0.4
1.3
t
HIGH
High period of SCL clock
0.6
μ
s
l
I
Input current with an input voltage be-
tween 0.1 V
DDIO
and 0.9 V
DDIO
MAX
-10
10
μ
A
Table 6-32
lists the master mode timing (clock phase = 0) and
Table 6-33
lists the timing (clock phase =
1).
Figure 6-17
and
Figure 6-18
show the timing waveforms.
Electrical Specifications
102
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