
TMS320C240, TMS320F240
DSP CONTROLLERS
SPRS042D – OCTOBER 1996 – REVISED NOVEMBER 1998
99
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
register file compilation (continued)
Table 20. Register File Compilation (Continued)
ADDR
BIT 15
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
REG
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
SERIAL COMMUNICATIONS INTERFACE (SCI) CONFIGURATION CONTROL REGISTERS
07050h
STOP
BITS
EVEN/ODD
PARITY
PARITY
ENABLE
SCI ENA
ADDR/IDLE
MODE
SCI
CHAR2
SCI
CHAR1
SCI
CHAR0
SCICCR
07051h
—
RX ERR
INT ENA
SW RESET
CLOCK ENA
TXWAKE
SLEEP
TXENA
RXENA
SCICTL1
07052h
BAUD15
(MSB)
BAUD14
BAUD13
BAUD12
BAUD11
BAUD10
BAUD9
BAUD8
SCIHBAUD
07053h
BAUD7
BAUD6
BAUD5
BAUD4
BAUD3
BAUD2
BAUD1
BAUD0
(LSB)
SCILBAUD
07054h
TXRDY
TX EMPTY
—
—
—
—
RX/BK
INT ENA
TX
INT ENA
SCICTL2
07055h
RX ERROR
RXRDY
BRKDT
FE
OE
PE
RXWAKE
—
SCIRXST
07056h
ERXDT7
ERXDT6
ERXDT5
ERXDT4
ERXDT3
ERXDT2
ERXDT1
ERXDT0
SCIRXEMU
07057h
RXDT7
RXDT6
RXDT5
RXDT4
RXDT3
RXDT2
RXDT1
RXDT0
SCIRXBUF
07058h
Reserved
07059h
TXDT7
TXDT6
TXDT5
TXDT4
TXDT3
TXDT2
TXDT1
TXDT0
SCITXBUF
0705Ah
to
0705Dh
Reserved
0705Eh
SCITXD
DATA IN
SCITXD
DATA OUT
SCITXD
FUNCTION
SCITXD
DATA DIR
SCIRXD
DATA IN
SCIRXD
DATA OUT
SCIRXD
FUNCTION
SCIRXD
DATA DIR
SCIPC2
0705Fh
—
SCITX
PRIORITY
SCIRX
PRIORITY
SCI
ESPEN
—
—
—
—
SCIPRI
07060h
to
0706Fh
Reserved
EXTERNAL INTERRUPT CONTROL REGISTERS
07070h
XINT1
FLAG
—
—
—
—
—
—
—
XINT1CR
—
XINT1
PIN DATA
0
—
—
XINT1
POLARITY
XINT1
PRIORITY
XINT1
ENA
07071h
Reserved
07072h
NMI
FLAG
—
—
—
—
—
—
—
NMICR
—
NMI
PIN DATA
1
—
—
NMI
POLARITY
—
—
07073h
to
07077h
Reserved
07078h
XINT2
FLAG
—
—
—
—
—
—
—
XINT2CR
—
XINT2
PIN DATA
—
XINT2
DATA DIR
XINT2
DATA OUT
XINT2
POLARITY
XINT2
PRIORITY
XINT2
ENA
07079h
Reserved