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參數(shù)資料
| 型號(hào)： | TMS320C15-25 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | Digital Signal Processors(160ns指令周期，分離的程序和數(shù)據(jù)總線，外部輪詢中斷的DSP) |
| 中文描述： | 數(shù)字信號(hào)處理器（160ns指令周期，分離的程序和數(shù)據(jù)總線，外部輪詢中斷的數(shù)字信號(hào)處理器） |
| 文件頁數(shù)： | 34/139頁 |
| 文件大?。?/td> | 1478K |
| 代理商： | TMS320C15-25 |
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TMS320C14, TMS320E14, TMS320P14
DIGITAL SIGNAL PROCESSORS
SPRS009C–JANUARY 1987–REVISED JULY 1991
POST OFFICE BOX 1443
HOUSTON, TEXAS 77001
34
event manager
An event manager is included that provides up to four capture inputs and up to six compare outputs. This
peripheral operates with the timers to provide a form of programmable event logging/detection. The six compare
outputs can also be configured to produce six channels of high precision PWM.
timers 1 and 2
Two identical 16-bit timers are provided for general purpose applications. Both timers include a 16-bit period
register and buffer latch, and can generate a maskable interrupt.
serial port timer
The serial port timer is a 16-bit timer primarily intended for baud rate generation for the serial port. Its architecture
is the same as timers 1 and 2, therefore it can serve as a general purpose timer if not needed for serial
communication.
watchdog timer
The
′
C14/E14/P14 contain a 16-bit watchdog timer that can produce a timeout (WDT) signal for various
applications such as software development and event monitoring. The watchdog timer also generates, at the
point of the timeout, a maskable interrupt signal to the CPU.
instruction set
A comprehensive instruction set supports both numeric-intensive operations, such as signal processing, and
general-purpose operations, such as high-speed control. All of the first-generation devices are object-code
compatible and use the same 60 instructions. The instruction set consists primarily of single-cycle single-word
instructions, permitting execution rates of more than six million instructions per second. Only infrequently used
branch and I/O instructions are multicycle. Instructions that shift data as part of an arithmetic operation execute
in a single cycle and are useful for scaling data in parallel with other operations.
NOTE
The BIO pin on other
′
C1x devices is not available for use in the
′
C14/E14/P14 devices. An attempt to
execute the BIOZ (Branch on BIO low) instruction will result in a two cycle NOP action.
Three main addressing modes are available with the instruction set: direct, indirect, and immediate addressing.
direct addressing
In direct addressing, seven bits of the instruction word concatenated with the 1-bit data page pointer from the
data memory address. This implements a paging scheme in which each page contains 128 words.
indirect addressing
Indirect addressing forms the data memory address from the least-significant eight bits of one of the two
auxiliary registers, AR0 and AR1. The Auxiliary Register Pointer (ARP) selects the current auxiliary register. The
auxiliary registers can be automatically incremented or decremented and the ARP changed in parallel with the
execution of any indirect instruction to permit single-cycle manipulation of data tables. Indirect addressing can
be used with all instructions requiring data operands, except for the immediate operand instructions.
immediate addressing
Immediate instructions derive data from part of the instruction word rather than from part of the data RAM. Some
useful immediate instructions are multiply immediate (MPYK), load accumulator immediate (LACK), and load
auxiliary register immediate (LARK).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320C15FNA | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
| TMS320C15FNL | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
| TMS320C15FNL25 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
| TMS320C15FNL-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor |
| TMS320C15NA | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
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