參數(shù)資料
型號: TLV320AIC3110IRHBR
廠商: TEXAS INSTRUMENTS INC
元件分類: 音頻/視頻放大
英文描述: AUDIO AMPLIFIER, PQCC32
封裝: 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁數(shù): 97/126頁
文件大小: 1528K
代理商: TLV320AIC3110IRHBR
LD(n)
LD(n+1)
WORD
CLOCK
BIT
CLOCK
DATA
-
1
-
2
-
3
2
1
0
3
-
1
-
2
-
3
2
1
0
3
-
1
-
2
N N N
-
3
RD(n)
LEFT CHANNEL
RIGHT CHANNEL
LD(n)=n'thsampleofleftchanneldata
RD(n)=n'thsampleofrightchanneldata
LD(n)
LD(n+1)
WORD
CLOCK
BIT
CLOCK
DATA
-
1
-
2
-
3
2
1
0
3
-
1
-
2
-
3
2
1
0
3
-
1
-
2
N N N
-
3
RD(n)
LEFT CHANNEL
RIGHT CHANNEL
LD(n)=n'thsampleofleftchanneldata
RD(n)=n'thsampleofrightchanneldata
LD(n)
LD(n+1)
WORD
CLOCK
BIT
CLOCK
DATA
3
N
-
1
N
-
2
N
-
3
2
1
0
3
N
-
1
N
-
2
N
-
3
2
1
0
3
N
-
1
N
-
2
N
-
3
RD(n)
LEFT CHANNEL
RIGHT CHANNEL
LD(n)=n'thsampleofleftchanneldata
RD(n)=n'thsampleofrightchanneldata
SLAS647 – DECEMBER 2009
www.ti.com
5.7.1.2
Left-Justified Mode
The audio interface of the TLV320AIC3110 can be put into left-justified mode by programming page 0 /
register 27, bits D7–D6 = 11. In left-justified mode, the MSB of the right channel is valid on the rising edge
of the bit clock following the falling edge of the word clock. Similarly, the MSB of the left channel is valid
on the rising edge of the bit clock following the rising edge of the word clock.
Figure 5-40. Timing Diagram for Left-Justified Mode
Figure 5-41. Timing Diagram for Left-Justified Mode With Offset = 1
Figure 5-42. Timing Diagram for Left-Justified Mode With Offset = 0 and Inverted Bit Clock
For the left-justified mode, the number of bit clocks per frame should be greater than or equal to twice the
programmed word length of the data. Also, the programmed offset value should be less than the number
of bit clocks per frame by at least the programmed word length of the data.
72
APPLICATION INFORMATION
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC3110
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