參數(shù)資料
型號: TLC8044FN
廠商: TEXAS INSTRUMENTS INC
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 9/32頁
文件大?。?/td> 477K
代理商: TLC8044FN
TLC8044
12-BIT
ANALOG-T
O-DIGIT
AL
INTERF
ACE
FOR
CHARGE-COUPLED
DEVICE
IMAGE
SENSORS
FOR
SCANNERS
SLAS128
JUNE
1997
POST
OFFICE
BOX
655303
DALLAS,
TEXAS
75265
17
Table 3. Mode Summary
MODE
DESCRIPTION
CDS
AVAILABLE
MAX
SAMPLE
RATE
SENSOR INTERFACE
DESCRIPTION
TIMING REQUIREMENTS
REGISTER CONTENTS
WITH CDS
REGISTER CONTENTS
WITHOUT CDS
1
Color
Yes
2 MSPS
The three input channels
(R, G, B) are sampled in
parallel at 2 MSPS
maximum. The sampled
data is multiplexed into a
single data stream before
the internal ADC, giving an
internal serial data rate of
maximum 6 MSPS.
MCLK max: 12 Mhz
MCLK: VSMP ratio is 6:1
Setup register 1:
Word 1: 00h
Word 2: 81h
Setup register 1:
Word 1: 00h
Word 2: 80h
2
Monochrome
Yes
2 MSPS
One input channel is
continuously sampled. The
internal multiplexer is held
in one position under
control of the user.
Identical to mode 1
Setup register 1:
Word 1: 00h
Word 2: 91h
Setup register 2:
Word 2: bits b(1,0) define
which channel to be
sampled
Setup register 1:
Word 1: 00h
Word 2: 90h
Setup register 2:
Word 2: bits b(1,0) define
which channel to be
sampled
3
Fast
monochrome
Yes
4 MSPS
Identical to mode 2
MCLK max: 12 MHz
MCLK: VSMP ratio is 3:1
Identical to mode 2 plus
Setup register 2:
Word 1: bits b(1,0) must be
set to 00h
Identical to mode 2
4
Max speed
monochrome
No
6 MSPS
Identical to mode 2
MCLK max: 12 MHz
MCLK: VSMP ratio is 2:1
Not supported
Setup register 1: 5Dh
Setup register 2:
Word 2: bits b(1,0) define
which channel to be
sampled
Only indicates relevant register bits.
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