參數(shù)資料
型號： TLC320AD50IDWR
廠商： TEXAS INSTRUMENTS INC
元件分類： 模擬信號調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PDSO28
封裝： PLASTIC, SO-28
文件頁數(shù)： 21/55頁
文件大?。?/td> 506K
代理商： TLC320AD50IDWR
3–1
3 Serial Communications
DOUT, DIN, SCLK, FS, and FC are the serial communication signals. The digital output data from the ADC is taken
from DOUT. The digital input data for the DAC is applied to DIN. The synchronizing clock for the serial communication
data and the frame sync is taken from SCLK. The frame-sync pulse that encloses the ADC and DAC data transfer
interval is taken from FS. For signal data transmitted from the ADC or to the DAC, primary serial communication is
used. To read or write words that control both the options and the circuit configurations of the device, secondary
communication is used.
The purpose of the primary and secondary communications is to allow conversion data and control data to be
transferred across the same serial port. A primary transfer is always dedicated to conversion data. A secondary
transfer is used to set up and/or read the register values. A primary transfer occurs for every conversion period. A
secondary transfer occurs only when requested. Secondary serial communication can be requested either by
hardware (FC terminal) or by software (D0 of primary data input to DIN).
3.1
Primary Serial Communication
Primary serial communication is used both to transmit and receive conversion signal data. The DAC word length
depends on the state of bit D0 in control 1 register. After power up or reset, the device defaults to the 15-bit mode.
When the DAC word length is 15 bits, the last bit of the primary 16-bit serial communication word is a control bit used
to request secondary serial communication. In the 16-bit mode, all 16 bits of the primary communication word are
used as data for the DAC and the hardware terminal FC must be used to request secondary communication.
Figure 3–1 shows the timing relationship for SCLK, FS, DOUT, and DIN in a primary communication. The timing
sequence for this operation is as follows:
1.
FS is brought low by the TLC320AD50C, TLC320AD50I, or TLC320AD52C.
2.
A 16-bit word is transmitted from the ADC (DOUT) and a 16-bit word is received from the DAC (DIN).
3.
FS is brought high by the TLC320AD50C, TLC320AD50I, or TLC320AD52C, signaling the end of the data
transfer.
D15
D14
D13
D12
D11
D10
D5
D4
D3
D2
D1
D0
FS
SCLK
DIN
D15
D14
D13
D12
D11
D10
D5
D4
D3
D2
D1
D0
DOUT
NOTE: DIN is latched at the falling edge of SCLK. DOUT is sent out at the rising edge of SCLK
Figure 3–1. Primary Serial Communication Timing
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參數(shù)描述
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