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參數(shù)資料
| 型號： | TDA9105A |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | DEFLECTION PROCESSOR FOR MULTISYNC MONITORS |
| 中文描述： | 偏轉(zhuǎn)處理器多同步監(jiān)測儀 |
| 文件頁數(shù)： | 14/31頁 |
| 文件大?。?/td> | 340K |
| 代理商： | TDA9105A |
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OPERATING DESCRIPTION
GENERAL CONSIDERATIONS
PowerSupply
The typical value of the power supply voltage V
CC
is12V.Perfectoperationis obtainedif V
CC
is main-
tainedin the limits : 10.8V
→
13.2V.
In order to avoid erratic operation of the circuit
during the transient phase of V
CC
switchingon, or
switchingoff,thevalueof V
CC
is monitoredand the
outputsof thecircuit are inhibitedif V
CC
< 7.6 typi-
cally.
Inordertohaveaverygoodpowersupplyrejection,
the circuit is internallypowered by several internal
voltage references (The unique typical value of
which is 8V). Two of these voltage references are
externally accessible,one for the verticalpart and
one for the horizontal part. These voltage refer-
ences can be used for the DC control voltages
appliedon theconcernedpinsby thewayof poten-
tiometers or digital to analog converters (DAC’s).
Furthermoreitisnecessarytofilterthea.m.voltage
references by the use of external capacitor con-
nected to ground, in order to minimize the noise
and consequently the “jitter” on vertical and hori-
zontaloutput signals.
DCControl Adjustments
Thecircuithas10adjustmentcapabilities: 2forthe
horizontal part, 2 for the E/W correction, 4 for the
vertical part, 2 for the Dynamic Horizontal phase
control.
The corresponding inputs of the circuit has to be
driven with a DC voltage typically comprised be-
tween 2 and 6V for a value of the internal voltage
referenceof 8V.
PWM
DAC
Output
DC Control
Voltage
V
REF
9
Figure 8 :
Exampleof Practical DC Control
Voltage Generation
9
Figure 10
H-SYNC
1.6V
9
Figure 9 :
Input Structure
In order to have a good tracking with the voltage
reference value, it’s better to maintain the control
voltagesbetweenV
REF
/4 and 3/4
V
REF
.
The input current of the DC control inputs is typi-
cally verylow (about a few
μ
A). Dependingon the
internalstructureof the inputs,it canbe positiveor
negative(sink or source).
HORIZONTAL PART
Inputsection
The horizontalinput is designed to be sensitiveto
TTLsignalstypicallycomprisedbetween0 and5V.
Thetypicalthresholdof thisinputis 1.6V.Thisinput
stageuses an NPN differentialstageand the input
current is very low.
Concerning the duty cycle of the input signal, the
followingsignals may be appliedto the circuit.
Using internal integration, both signals are recog-
nizedon conditionthat Z/T
≤
25%.Synchronisation
occurs on the leading edge of the internal sync
signal. The minimum value of Z is 0.7
μ
s.
PLL1
The PLL1 is composed of a phasecomparator,an
external filter and a Voltage Controlled Oscillator
(VCO).
Thephasecomparatorisa“phasefrequency”type,
designed in CMOStechnology.This kind of phase
detector avoids locking on false frequencies.It is
followed by a “charge pump”, composed of 2 cur-
rent sources sink andsource (I = 1mAtyp.)
TDA9105A
14/31
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