參數(shù)資料
型號(hào): TDA8357J
廠商: NXP SEMICONDUCTORS
元件分類: 偏轉(zhuǎn)
英文描述: Full bridge current driven vertical deflection output circuit in LVDMOS(LVDMOS中的整橋電流驅(qū)動(dòng)的垂直偏轉(zhuǎn)輸出電路)
中文描述: VERTICAL DEFLECTION IC, PZIP9
封裝: POWER, PLASTIC, SOT-523-1, DIL-BENT-SIL, 9 PIN
文件頁(yè)數(shù): 5/16頁(yè)
文件大?。?/td> 96K
代理商: TDA8357J
1999 Nov 10
5
Philips Semiconductors
Preliminary specification
Full bridge vertical deflection output circuit
in LVDMOS
TDA8357J
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Notes
1.
2.
3.
4.
5.
When the voltage at pin OUTA supersedes 70 V the circuit will limit the voltage.
At T
j(max)
.
Equivalent to 200 pF capacitance discharge through a 0
resistor.
Equivalent to 100 pF capacitance discharge through a 1.5 k
resistor.
Internally limited by thermal protection at T
j
170
°
C.
THERMAL CHARACTERISTICS
In accordance with IEC 747-1.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
P
V
FB
V
n
supply voltage
flyback supply voltage
DC voltage
pin OUTA
pin OUTB
pins INA, INB, GUARD and FEEDB
DC current
pins OUTA and OUTB
pins OUTA and OUTB
pins INA, INB, GUARD and FEEDB
latch-up current
18
68
V
V
note 1
0.5
68
V
P
V
P
V
V
V
I
n
during scan (p-p)
at flyback (peak); t
1.5 ms
20
2.0
±
1.2
+20
+200
A
A
mA
mA
I
lu
current into any pin; pin voltage
is 1.5
×
V
P
; note 2
current out of any pin; pin voltage
is
1.5
×
V
P
; note 2
machine model; note 3
human body model; note 4
200
mA
V
es
electrostatic handling voltage
300
2000 +2000 V
8
55
+150
25
+75
150
+300
V
P
tot
T
stg
T
amb
T
j
total power dissipation
storage temperature
ambient temperature
junction temperature
W
°
C
°
C
°
C
note 5
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
R
th(j-c)
R
th(j-a)
thermal resistance from junction to case
thermal resistance from junction to ambient
6
65
K/W
K/W
in free air
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TDA8358 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full bridge vertical deflection output circuit in LVDMOS with east-west amplifier
TDA8358J 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full bridge vertical deflection output circuit in LVDMOS with east-west amplifier
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