參數(shù)資料
型號: TDA8024
廠商: NXP Semiconductors N.V.
英文描述: ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85%
中文描述: IC卡接口
文件頁數(shù): 13/29頁
文件大?。?/td> 172K
代理商: TDA8024
2004 July 12
13
Philips Semiconductors
Product specification
IC card interface
TDA8024
8.7
Active mode
When the activation sequence is completed, the TDA8024
will be in its active mode. Data is exchanged between the
card and the microcontroller via the I/O lines. The
TDA8024 is designed for cards without V
PP
(the voltage
required to program or erase the internal non-volatile
memory).
8.8
Deactivation sequence
When a session is completed, the microcontroller sets the
CMDVCC line HIGH. The circuit then executes an
automatic deactivation sequence by counting the
sequencer back and finishing in the inactive mode (see
Fig.9):
1.
2.
RST goes LOW (t
10
).
CLK is held LOW (t
12
= t
10
+ 0.5
×
T) where T is 64
times the period of the internal oscillator
(approximately 25
μ
s).
I/O, AUX1 and AUX2 are pulled LOW (t
13
= t
10
+ T).
V
CC
starts to fall towards zero (t
14
= t
10
+ 1.5
×
T).
The deactivation sequence is complete at t
de
, when
V
CC
reaches its inactive state.
V
UP
falls to zero (t
15
= t
10
+ 5T) and all card contacts
becomelow-impedancetoGND;I/OUC,AUX1UCand
AUX2UC remain at V
DD
(pulled-up via a 11 k
resistor).
The internal oscillator returns to its lower frequency.
3.
4.
5.
6.
7.
handbook, full pagewidth
RST
CMDVCC
CLK
I/O
VUP
VCC
t15
t14
t13
t12
MDB056
tde
t10
Fig.9 Deactivation sequence.
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相關代理商/技術參數(shù)
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