參數(shù)資料
型號(hào): TAS5504PAGG4
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁(yè)數(shù): 61/96頁(yè)
文件大?。?/td> 1216K
代理商: TAS5504PAGG4
Serial Control I2C Register Summary
57
SLES123 October 2004
TAS5504
5
Serial Control I2C Register Summary
The TAS5504 slave address is 0x36. See the Serial Control I2C Register Bit Definitions chapter for complete
bit definitions.
Note that u indicates unused bits.
I2C
SUBADDRESS
TOTAL
BYTES
REGISTER FIELDS
DESCRIPTION OF CONTENTS
DEFAULT STATE
0x00
1
Clock control register
Set data rate and MCLK frequency
1. Fs = 48 kHz
2. MCLK = 256 Fs = 12.288 MHz
0x01
1
General status register
Clip indicator and ID code for the
TAS5504
0x01
0x02
1
Error status register
PLL, SCLK, LRCLK, and frame slip
errors
No errors
0x03
1
System control register 1
PWM high pass, clock set, un-mute
select, PSVC select
1. PWM high pass disabled
2. Auto clock set
3. Hard un-mute on clock error
recovery
4. PSVC HIZ disable
0x04
1
System control register 2
Automute and de-emphasis control
1. Automute timeout disable
2. Post-DAP detection automute
enabled
3. 4-Ch device input detection
automute enabled
4. Un-mute threshold 6 dB over input
5. No de-emphasis
0x05 – 0x06
1
Channel configuration registers Configure channels 1 and 2
1. Enable backend reset
2. Valid low for reset
3. Valid low for mute
4. Normal BEPolarity
5. Don’t remap the output for the
TAS5182
6. Don’t go low-low in mute
7. Don’t remap Hi-Z state to
low-low state
0x07 – 0x0A
Reserved
0x0B – 0x0C
Channel configuration registers Configure channels 3 and 4
1. Enable backend reset2. Valid
low for reset3. Valid low for mute4.
Normal BEPolarity5. Don’t remap
the output for the TAS51826. Don’t
go low-low in mute7. Don’t remap
Hi-Z state to low-low state
0x0D
1
Headphone configuration
register
Configure headphone output
1. Disable backend reset sequence
2 Valid does not have to be low for
reset
3. Valid does not have to be low for
mute
4. Normal BEPolarity
5. Don’t remap output to comply
with 5182
6. Don’t go low-low in mute
7. Don’t remap HiZ state to
low-low state
0x0E
1
Serial data interface register
Set serial data interface to right
justified, I2S, or left justified
24-bit I2S
0x0F
1
Soft mute register
Soft mute for channels 1, 2, 3, and 4
Un-mute all channels
0x10 – 0x13
RESERVED
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