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參數(shù)資料
| 型號(hào)： | T7234 |
| 英文描述： | Compliance with the New ETSI PSD Requirement |
| 中文描述： | 符合新的ETSI PSD的要求 |
| 文件頁(yè)數(shù)： | 94/116頁(yè) |
| 文件大?。?/td> | 1056K |
| 代理商： | T7234 |
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Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
90
Lucent Technologies Inc.
Questions and Answers
(continued)
S/T-Interface
(continued)
A36:
(continued)
b) Receiver Levels:
The T7256 S/T line interface transformer has
a turns ratio of 2.5. The receiver expects to
see nominal pulse levels of 750 mV x 2.5 =
1.875 V.
T7903: The transmitter circuit is a current
source of 7.5 mA. To generate a voltage of
1.875 V with 7.5 mA requires a resistance of
1.875/0.0075 = 250
.
T7250C: The transmitter circuit is a current
source of 6 mA. To generate a voltage of
1.875 V with 6 mA requires a resistance of
1.875/0.006 = 312.5
.
c) Resistor Selection:
In this section, the term receiver implies not
only the receive section on the chip, but also
the external 10 k
resistors connected to the
receiver. These resistors remain unchanged
from the standard line interface circuit in
order to maintain the same total receiver
impedance.
T7903: Ideally, the transmitter should be driv-
ing into 240
, and the T7256 receiver wants
to see the levels that would result if the trans-
mitter drove 7.5 mA through 250
. Since
these resistance values are so close, 249
is chosen as the resistor across which the
receiver is connected, and no other series
resistance is needed in the transmit path, as
Figure 37 illustrates.
T7250C: Ideally, the transmitter should be
driving into 425
, and the T7256 receiver
wants to see the levels that would result if the
transmitter drove 6 mA through 312.5
. So,
the total transmit path resistance should be
divided into three resistors. The first is the
resistor across which the receiver is con-
nected and should be approximately 312.5
so that the receiver sees the correct levels. A
standard 309
value is adequate for this
case. The remainder of the 425
should be
divided equally between two other series
resistors in the transmit path, and (425 –
309)/2 is 58.0
, so a standard 57.6
value
is chosen for the two other series resistors as
illustrated in Figure 38.
d) Receiver Bias:
Normally, the transmitter of the T7903/
T7250C is biased at 5 V through 100 k
pull-
up, and the receiver of the T7256 is biased at
2.16 V through a resistor network that can be
simplified as shown in Figure 33 (A). When
the direct-connect scheme is implemented,
the resulting network between the T7903/
T7250C transmitter and the T7256 receiver is
as shown in Figure 33 (B).
(A)
(B)
5-4726
Figure 33. Receiver Bias
Note that the receiver bias in Figure 33 (B) is
increased to 2.33 V (from 2.16 V in Figure 33
(A)). This is an increase of about 8% (0.67 dB).
This will decrease the overall receiver sensitivity
slightly. Normally, the receiver must have a sensi-
tivity to signals down to –7.5 dB of nominal.
Therefore, in the case of a direct connect, the
sensitivity is not an issue since the receiver will
always see a large input signal.
5 V
5 V
5 V
CHIP PIN
100 k
30 k
23 k
2.16 V
CHIP PIN
10 k
100 k
CHIP PIN
30 k
23 k
2.33 V
100 k
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| T7234A | 制造商:AGERE 制造商全稱:AGERE 功能描述:Compliance with the New ETSI PSD Requirement |
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