參數(shù)資料
型號： T7234
英文描述： Compliance with the New ETSI PSD Requirement
中文描述： 符合新的ETSI PSD的要求
文件頁數(shù)： 109/116頁
文件大小： 1056K
代理商： T7234
Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
Lucent Technologies Inc.
105
Glossary
ACTMODE/INT:
Act bit mode, serial interface
microprocessor interrupt.
ACTR:
Receive activation
(register CFR1, bit 0).
ACTSC:
Activation/deactivation state
change on U-interface
(register UIR0, bit 1).
ACTSCM:
Activation/deactivation state
change on U-interface interrupt
mask (register UIR1, bit 1).
ACTSEL:
Act mode select (register
GR2, bit 6).
ACTT:
Transmit activation (register
GR1, bit 4).
AFRST:
Adaptive filter reset (register
CFR0, bit 1).
AIB:
Alarm indication bit (register
CFR1, bit 6).
ANSI:
American National Standards In-
stitute.
ASI:
Alternate space inversion.
AUTOACT:
Automatic activation control
(register GR0, bit 6).
AUTOCTL:
Auto control enable
(register GR0, bit 3).
AUTOEOC:
Automatic eoc processor
enable (register GR0, bit 4).
A[3:1]R:
Receive eoc address (register
ECR2, bits 0—2).
A[3:1]T:
Transmit eoc address
(register ECR0, bits 0—2).
BERR:
Block error on U-interface
(register UIR0, bit 2).
BERRM:
Block error on U-interface inter-
rupt mask (register UIR1, bit 2).
CCRC:
Corrupt cyclic redundancy check
(register ECR0, bit 7).
CDM:
Charged-device model.
CFR0:
Control flow state machine con-
trol—maintenance/reserved bits
register.
CFR1:
Control flow state machine status
register.
CFR2:
Control flow state machine
status—reserved bits register.
CKOUT:
Clock output.
CODEC:
Coder/decoder, typically used for
analog-to-digital conversions or
digital-to-analog conversions.
CRATE[1:0]:
CKOUT rate control (register
GR0, bits 2—1).
CRC:
Cyclic redundancy check.
DFR0:
Data flow control—U and S/T
B-channels register.
DFR1:
Data flow control—D-channels
and TDM bus register.
DMR:
Receive eoc data or message in-
dicator (register ECR2, bit 3).
DMT:
Transmit eoc data or message in-
dicator (register ECR0, bit 3).
DPGS:
Digital pair gain system.
ECR0:
eoc state machine control—ad-
dress register.
ECR2:
eoc state machine status—ad-
dress register.
ECR3:
eoc state machine status—infor-
mation register.
EMINT:
Exit maintenance mode interrupt
(register MIR0, bit 2).
EMINTM:
Exit maintenance mode interrupt
mask (register MIR1, bit 2).
EOC:
Embedded operations channel.
EOCSC:
eoc state change on U-interface
(register UIR0, bit 0).
EOCSCM:
eoc state change on U-interface
mask (register UIR1, bit 0).
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