參數(shù)資料
型號(hào): STV9937
廠商: 意法半導(dǎo)體
英文描述: 120-MHz On-Screen Display for Monitors including PictureBooSTTM and 4 True Independent Window Displays
中文描述: 120 - MHz的屏幕的顯示器,其中包括PictureBooSTTM和4個(gè)真正的獨(dú)立的窗口顯示顯示
文件頁數(shù): 34/49頁
文件大?。?/td> 441K
代理商: STV9937
Picture BooSTTM
STV9937
34/49
7.4
Line and Pixel Offsets
Due to the intrinsic delay on the RGB channel during the RGB decoding, 2 offsets can be applied for
fine tuning as shown in below:
Note:It is recommended to adjust the pixel offset each time the monitor resolution changes.
7.5
PLL Synchronised
The STV9937 PLL can either be synchronized on the HFLY or HSYNC signals.
WARNING:Once synchronized on HFLY, the Picture BooST
TM
feature cannot be guaranteed.
HFLYP
The HFLYP bit configures the polarity of the HFLY signal
0: Falling edge active (default value)
1: Rising edge active
OSDREF
The OSDREF selects the signal taken as reference
0: HFLY is the reference (default value)
1: HSYNC is the reference
ENPB
The ENPB bit selects Picture BooST
TM
decoding
0: The RGB video inputs are not decoded, there is no possibility of displaying the PB.
The user can write X1/X2 Y1/Y2 coordinates in the registers, but the On/Off bit is
inactive (default value)
1: PB decoding is active and the PB display can be made active with the PBON bit
PBON
The PBON bit selects Picture BooST
TM
display
0: PB is not displayed (default value)
1: PB is displayed on the screen with the coordinates written in the X/Y registers
PBVM
The PBVM bit selects the Picture BooST
TM
interface
0: Interface via RGB (default value)
1: Interface via I2C
Bits
Description
OFFSETLIN[1:0]
The line offset in SIGNED radix is coded on 2 bits from -2 to +1. Default value is 0.
OFFSETPIX[5:0]
The pixel offset in SIGNED radix is coded on 6 bits from -32 to +31. Default value is 0.
Bit
Description
HMUX
0: HSYNC is the synchronization signal
1: HFLY is the synchronization signal
Table 37: PictureBooST
TM
Configuration
Bit
Description
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