參數(shù)資料
型號: STPCI2GDY
廠商: 意法半導(dǎo)體
英文描述: X86 Core PC Compatible System-on-Chip for Terminals
中文描述: x86內(nèi)核PC兼容系統(tǒng)上的終端芯片
文件頁數(shù): 40/111頁
文件大?。?/td> 1896K
代理商: STPCI2GDY
STRAP OPTION
40/
111
Issue 1.0
- July 24, 2002
3.2. TYPICAL STRAP OPTION
IMPLEMENTATION
Table Table 3-1.
shows the detailed Strap options
required to boot the STPC in ISA mode with a
Host Clock Frequency of 66MHz in X2 mode with
internal keyboard/mouse, UARTS and parallel
port enabled.
Signal
Designation
Actual
Settings
Pull Up
Pull down
Pull down
Pull up
Pull down
Pull up
Pull down
Pull down
Pull down
Pull down
Pull down
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull down
Pull up
Pull up
Pull up
Pull up
Pull up
Pull down
Pull up
Pull down
Pull down
User defined
Pull down
Pull down
Pull up
Pull down
Pull up
Pull down
Description
MD1
MD2
MD3
MD[4]
MD[5]
MD[6]
MD[7]
MD[8]
MD[9]
MD10
MD11
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD40
MD41
MD42
MD 43
Reserved
2
-
HCLK Speed
HCLK = 66MHz
PCI_CLKO Divisor
MCLK Synchro (see
Section 3.1.1.
)
PCICLK = HCLK/2
Asynchronous
PCICLK PLL Window =
32MHz - 64MHz
PCI_CLKO Programming
ISA / PCMCIA / Local Bus
ISA Mode
Reserved
2
Reserved
2
-
-
CPU clock Multiplication
Reserved
2
Reserved
2
PCI_CLKO Divisor
HCLK Pad Direction
MCLK Pad Direction
DCLK Pad Direction
Reserved
2
Reserved
2
X2 Mode
-
-
PCICLK = HCLK/2
Output
Output
Output
-
-
HCLK PLL Speed
HCLK = 66MHz
Reserved
2
Reserved
2
Reserved
2
Reserved
2
Reserved
2
Reserved
2
Reserved
2
Reserved
2
Reserved
2
-
-
-
-
Local Bus Boot Device Size
Reserved
2
Reserved
2
CPU clock Multiplication
Reserved
2
Reserved
2
Reserved
2
Not Applicable
-
-
X2 mode
-
-
-
Note
1
: Strap options on TC/PA[3] and DACK_ENC[2:0]/PA[2:0] are required for all the STPC Atlas Configurations (ISA,
PCMCIA, Local Bus).
Note
2
: Must be implemented.
Table 3-1. Typical Strap Option Implementation
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