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參數(shù)資料
| 型號(hào)： | STPCI2GDY |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | X86 Core PC Compatible System-on-Chip for Terminals |
| 中文描述： | x86內(nèi)核PC兼容系統(tǒng)上的終端芯片 |
| 文件頁(yè)數(shù)： | 25/111頁(yè) |
| 文件大小： | 1896K |
| 代理商： | STPCI2GDY |
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PIN DESCRIPTION
Issue 1.0 - July 24, 2002
25/111
MCLK,
Mouse Clock line. Mouse data is latched
by the controller on each negative clock edge
produced on this pin. The mouse can be disabled
by pulling this pin low by software control.
MDATA,
Mouse Data Line. 11-bits of data are
shifted serially through this line when data is being
transferred. Data is synchronised to MCLK.
2.2.15. PARALLEL PORT
PE
Paper End.Input status signal from printer.
SLCT
Printer Select. Printer selected input.
BUSY#
Printer Busy.
Input status signal from printer.
ERR#
Error. Input status signal from printer.
ACK#
Acknowledge.
Input status signal from printer.
PDDIR#
Parallel Device Direction.
Bidirectional control line output.
STROBE#
PCS/Strobe#.
Data transfer strobe line to printer.
INIT#
Initialize Printer.This output sends an
initialize command to the connected printer.
AUTOFD#
Automatic Line feed.This output sends
a command to the connected printer to
automatically generate line feed on received
carriage returns.
SLCTIN#
Select In. Printer select output.
PPD[7-0]
Parallel Port Data Lines Data transfer
lines to printer. Bidirectional depending on modes.
2.2.16. MISCELLANEOUS
SPKRD
Speaker Drive. This is the output to the
speaker and is the AND of the counter 2 output
with bit 1 of Port 61h and drives an external
speaker driver. This output should be connected
to a 7407 type high voltage driver.
SCAN_ENABLE
Reserved This pin is reserved
for Test and Miscellaneous functions. It has to be
set to ‘0’ or connected to ground in normal
operation.
COL_SEL
Colour Select.Can be used for Picture
in Picture function. Note however that this signal,
brought out from the video pipeline, is not in sync
with the VGA output signals, i.e. the VGA signals
run four clock cycles after the Col_Sel signal.
2.2.17. JTAG INTERFACE
TCLK
Test clock
TDI
Test data input
TMS
Test mode input
TDO
Test data output
TRST
Test reset input
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| STPCI2HEYC | X86 Core PC Compatible System-on-Chip for Terminals |
| STPC12HEYI | X86 Core PC Compatible System-on-Chip for Terminals |
| STPC12GDYI | X86 Core PC Compatible System-on-Chip for Terminals |
| STPC12 | X86 Core PC Compatible System-on-Chip for Terminals |
| STPC12HEYC | X86 Core PC Compatible System-on-Chip for Terminals |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STPCI2GDYI | 功能描述:微處理器 - MPU 120MHz x86 SoC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| STPCI2GDYIE | 制造商:STMicroelectronics 功能描述: |
| STPCI2HDYC | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:PERIPHERAL (MULTIFUNCTION) CONTROLLER |
| STPCI2HEYC | 功能描述:微處理器 - MPU 133MHz x86 SoC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| STPCI2HEYI | 功能描述:微處理器 - MPU 133MHz x86 SoC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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