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參數(shù)資料
| 型號(hào)： | STPCD0110BTC3 |
| 元件分類： | 32位微控制器 |
| 英文描述： | 32-Bit Microprocessor |
| 中文描述： | 32位微處理器 |
| 文件頁數(shù)： | 20/61頁 |
| 文件大?。?/td> | 1007K |
| 代理商： | STPCD0110BTC3 |
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PIN DESCRIPTION
20/61
Issue 2.2 - October 13, 2000
ISACLK and ISACLKX2 as the input selection
strobes.
DREQ_MUX[1:0]
ISA Bus Multiplexed DMA Re-
quest. These are the ISA bus DMA request sig-
nals. They are to be encoded before connection to
the STPC Client using ISACLK and ISACLKX2 as
the input selection strobes.
DACK_ENC[2:0]
DMA Acknowledge. These are
the ISA bus DMA acknowledge signals. They are
encoded by the STPC Client before output and
should be decoded externally using ISACLK and
ISACLKX2 as the control strobes.
TC
ISA Terminal Count. This is the terminal count
output of the DMA controller and is connected to
the TC line of the ISA bus. It is asserted during the
last DMA transfer, when the Byte count expires.
2.2.12. MONITOR INTERFACE
RED, GREEN, BLUE
RGB Video Outputs. These
are the 3 analog color outputs from the RAM-
DACs. These signals are sensitive to interference,
therefore they need to be properly shielded.
VSYNC
Vertical Synchronization Pulse. This is
the vertical synchronization signal from the VGA
controller.
HSYNC
Horizontal Synchronization Pulse. This is
the horizontal synchronization signal from the
VGA controller.
VREF_DAC
DAC Voltage reference. An external
voltage reference is connected to this pin to bias
the DAC.
RSET
Resistor Current Set. This reference cur-
rent input to the RAMDAC is used to set the full-
scale output of the RAMDAC.
COMP
Compensation. This is the RAMDAC com-
pensation pin. Normally, an external capacitor
(typically 10nF) is connected between this pin and
V
DD
to damp oscillations.
DDC[1:0]
Direct Data Channel Serial Link. These
bidirectional pins are connected to CRTC register
3Fh to implement DDC capabilities. They conform
to I
2
C electrical specifications, they have open-
collector output drivers which are internally con-
nected to V
DD
through pull-up resistors.
They can instead be used for accessing I2C devic-
es on board. DDC1 and DDC0 correspond to SCL
and SDA respectively.
2.2.13. MISCELLANEOUS
ST[6],
Reserved.
ST[5]
This is used for speaker output.
ST[4]
Reserved.
ST[3:0]
The pins are for testing the STPC. The
default settings on these pins should be 1111 for
the STPC to function correctly. By setting the
ST[3:0] to 0111, the STPC is tristated.
CLKDEL[2:0]
Reserved The pins are reserved
for Test and Miscellaneous functions)
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