參數(shù)資料
型號: STP2223BGA
元件分類: 總線控制器
英文描述: PCMCIA BUS CONTROLLER, PBGA456
封裝: PLASTIC, BGA-456
文件頁數(shù): 24/34頁
文件大?。?/td> 476K
代理商: STP2223BGA
30
STP2223BGA
UPA to PCI Interface
U2P
July 1997
Note: Measurement conditions for Tval (max) rise = 25 Ohm/10pf parallel to ground, and for Tval (max) fall = 10pf to ground,
25 Ohm to VDD. Refer to PCI 2.1 Specication, Chapter 7, for full AC specications on output buffers.
A_CLK, B_CLK Timing
Figure 8. A_CLK, B_CLK AC timing parameters
JTAG Timing
T_val(ptp)
pci_clk to Signal Valid Delay - pci_req_l
(See Note)
2
12
ns
T_on
Float to Active Delay
(See Note)
2
ns
T_off
Active to Float Delay
28
ns
TABLE 14: A_CLK, B_CLK timing parameters
Symbol
Parameter
Conditions
Min
Max
Unit
T_cyc
PSYCLOPS_CLK cycle time
15
25
ns
T_skew
clock skew to PSYCLOPS_CLK
-750
+750
ps
T_duty
A_CLK, B_CLK duty cycle requirement
Tcyc/2
-750
Tcyc/2
+750
ps
TABLE 15: JTAG Timing Characteristics
Symbol
Parameter
Conditions
Min
Max
Unit
JTAG clock
T_cyc
JTAG clk Cycle Time
100
ns
JTAG Inputs
TABLE 13: PCIB AC Timing Characteristics (Continued)
Symbol
Parameter
Conditions
Min
Max
Unit
T_cyc
PSYCLOPS_CLK
A_CLK
B_CLK
T_duty
T_skew
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