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| 型號(hào)： | STMPE2401TBR |
| 廠(chǎng)商： | STMICROELECTRONICS |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 24 I/O, PIA-GENERAL PURPOSE, PBGA36 |
| 封裝： | LEAD FREE, TFBGA-36 |
| 文件頁(yè)數(shù)： | 35/55頁(yè) |
| 文件大?。?/td> | 959K |
| 代理商： | STMPE2401TBR |
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Keypad controller
STMPE2401
40/55
13
Keypad controller
The main operations of the keypad controller are controlled by four dedicated key controllers
that support up to four simultaneous dedicated key presses and a key scan controller and
two normal key controllers that support a maximum of 12x8 key matrix with detection of two
simultaneous key presses.
Four of the column inputs can be configured as dedicated keys through the setting of
Dkey0~3 bits of KPC_ctrl register.
The normal key matrix size is configurable through the setting of KPC_row and KPC_col
registers. The scanning of each individual row output and column input can be enabled or
masked to support a key matrix of variable size from 1x1 to 12x8.
The operation of the keypad controller is enabled by the SCAN bit of KPC_ctrl register.
Every key activity detected will be de-bounced for a period set by the DB_0~7 bits of
KPC_ctrl register before a key press or key release is confirmed and updated into the output
FIFO. The key data, indicating the key coordinates and its status (up or down), is loaded into
the FIFO at the end of a specified number of scanning cycles (set by ScanCount0~3 bits of
KPC_row_msb register). An interrupt will be generated when a new set of key data is
loaded. The FIFO has a capacity for four sets of key data. Each set of key data consists of
three bytes of information when any of the four dedicated keys is enabled. It is reduced to
two bytes when no dedicated key is involved. When the FIFO is full before its content is
read, an overflow signal will be generated while the FIFO will continue to hold its content but
forbid loading of new key data set.
Figure 9.
Keypad controller
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