參數(shù)資料
型號(hào)： STMPE2401TBR
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 24 I/O, PIA-GENERAL PURPOSE, PBGA36
封裝： LEAD FREE, TFBGA-36
文件頁(yè)數(shù)： 24/55頁(yè)
文件大?。?/td> 959K
代理商： STMPE2401TBR
GPIO controller
STMPE2401
30/55
10.2
GPIO alternate function register (GPAFR)
GPAFR is to select the functionality of the GPIO pin. To select a function for a GPIO pin, a
bit-pair in the register (GPAFR_U or GPAFR_L) has to be set.
Register name
Function
GPIO Edge Detect Status
Set to ‘1’ by hardware when there is a rising/falling edge on the corre-
sponding GPIO. Writing ‘1’ clears the bit. Writing ‘0’ has no effect.
GPIO Rising Edge
Set to ‘1’ to enable rising edge detection on the corresponding GPIO.
GPIO Falling Edge
Set to ‘1’ to enable falling edge detection on the corresponding GPIO.
GPIO Pull Up
Set to ‘1’ to enable internal pull-up resistor
GPIO Pull Down
Set to ‘1’ to enable internal pull-down resistor
Table 28. Bit’s function
GPAFR_U_msb
Bit
23
22212019181716
AF23
AF22
AF21
AF20
R/W
RW
RWRWRW
Reset
Value
0
000
00
GPAFR_U_csb
Bit
15
1413121110
9
8
AF19
AF18
AF17
AF16
R/W
RW
RWRWRW
Reset
Value
0
000
00
GPAFR_U_lsb
Bit
7
65
432
10
AF15
AF14
AF13
AF12
R/W
RW
RWRWRW
Reset
Value
0
000
00
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