參數(shù)資料
型號(hào)： STMPE2401TBR
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 24 I/O, PIA-GENERAL PURPOSE, PBGA36
封裝： LEAD FREE, TFBGA-36
文件頁(yè)數(shù)： 13/55頁(yè)
文件大?。?/td> 959K
代理商： STMPE2401TBR
System controller
STMPE2401
20/55
7.3
States of operation
The device has three main modes of operation:
●
Operational Mode: This is the mode, whereby normal operation of the device takes
place. In this mode, the RC clock is available and the Main FSM Unit routes this clock
and the 32 KHz clock to all the device blocks that are enabled. In this mode, individual
blocks that need not be working can be turned off by the master by programming the
bits 3 to 0 of the SYSCON register.
●
Sleep Mode: In this low-power mode, the RC Oscillator is powered down. All the blocks
which need clocks derived from the 32KHz clock will continue getting a 32KHz clock. In
this mode also, individual blocks can be turned off by the master by programming the
bits 3 to 0 of the SYSCON register. However, the master needs to program the
SYSCON register before coming into this mode, as in the sleep mode, the IIC interface
is not active except to detect traffic for wakeup. Any activity on the I2C port or Wakeup
pin or Hotkey activity will cause the device to leave this mode and go into the
Operational mode. When leaving this mode, the I2C will need to hold the SCLK till the
RC clock is ready.
●
Hibernate Mode: This mode is entered when the system writes a ‘1’ to bit 5 of the
SYSCON register. In this mode, the device is completely inactive as there is absolutely
no clock. Only a Reset or a wakeup on IIC will bring back the System to operational
mode. All I2C activities are ignored.
Caution:
Hotkey detection is not possible in hibernate mode.
Figure 5.
State of operation
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