
Description
STM32W108CB, STM32W108HB
Doc ID 16252 Rev 3
1
Description
The STM32W108 is a fully integrated System-on-Chip that integrates a 2.4 GHz, IEEE
802.15.4-compliant transceiver, 32-bit ARM Cortex-M3 microprocessor, Flash and RAM
memory, and peripherals of use to designers of ZigBee-based systems.
Figure 1.
STM32W108 block diagram
The transceiver utilizes an efficient architecture that exceeds the dynamic range
requirements imposed by the IEEE 802.15.4-2003 standard by over 15 dB. The integrated
receive channel filtering allows for robust co-existence with other communication standards
in the 2.4 GHz spectrum, such as IEEE 802.11 and Bluetooth. The integrated regulator,
VCO, loop filter, and power amplifier keep the external component count low. An optional
high performance radio mode (boost mode) is software-selectable to boost dynamic range.
The integrated 32-bit ARM Cortex-M3 microprocessor is highly optimized for high
performance, low power consumption, and efficient memory utilization. Including an
integrated MPU, it supports two different modes of operation: Privileged mode and
Unprivileged mode. The networking stack software runs in Privileged mode with full access
to all areas of the chip. Application code runs in Unprivileged mode with limited access to
the STM32W108 resources; this allows for the scheduling of events by the application
developer while preventing modification of restricted areas of memory and registers. This
architecture results in increased stability and reliability of deployed solutions.
The STM32W108 has 128 Kbytes of embedded Flash memory and 8 Kbytes of integrated
RAM for data and program storage. The STM32W108 HAL software employs an effective
wear-leveling algorithm that optimizes the lifetime of the embedded Flash.
To maintain the strict timing requirements imposed by the ZigBee and IEEE 802.15.4-2003
standards, the STM32W108 integrates a number of MAC functions into the hardware. The
Packet sniffer
ADC
RF_P,N
Program
Flash
128 kBytes
Data
SRAM
8 kBytes
HF crystal
OSC
LF crystal
OSC
General
Purpose
ADC
Serial
Wire and
JTAG
debug
Internal LF
RC-OSC
GPIO multiplexor swtich
Chip
manage r
Regulator
Bias
2
nd level
Interrupt
controller
RF_TX_ALT_P,N
OSCA
OSCB
PA[7:0], PB[7:0], PC[7:0]
Encryption
acclerator
IF
Always
Powered
Domain
ARM CORTEX-M3
CPU with NVIC
and MPU
VREG_OUT
Watchdog
PA select
LNA
PA
DAC
MAC
+
Baseband
Sleep
timer
BIAS_R
POR
nRESET
General
purpose
timers
GPIO
registers
UART/
SPI/TWI
SYNTH
Internal HF
RC-OSC
TX_ACTIVE
SWCLK,
JTCK
Calibration
ADC
Packet Trace
CPU debug
TPIU/ITM/
FPB/DWT
Ai15250