參數(shù)資料
型號: STE2001DIE1
廠商: 意法半導(dǎo)體
英文描述: 65 X 128 SINGLE CHIP LCD CONTROLLER / DRIVER
中文描述: 65 × 128單芯片LCD控制器/驅(qū)動
文件頁數(shù): 12/36頁
文件大?。?/td> 326K
代理商: STE2001DIE1
STE2001
12/36
- Display blank (E = D = 0)
- Address counter X[6: 0] = 0 and Y[3 : 0] = 0
- Temperature coefficient (TC[1 : 0] = 0)
- Bias system (BS[2 : 0] = 0)
- V
OP
= 0
- Power Down (PD = 1)
To clear the RAM content a MEMORY BLANK instruction should be executed.
PowerDown (PD = 1)
When at Power Down, all LCD outputs arekept at V
SS
(display off). Bias generator and V
LCD
generator are OFF
(V
LCDOUT
output is discharged to V
SS
, and then is possible to disconnect V
LCDOUT
). The internal Oscillator is in
off state. An external clock can be provided. The RAM contents is not cleared.
ChargePump Factor
The desired Charge Pump Multiplication Factor can be programmed though the S1 and S0 bits, as follows:
At Reset the X2 factor is selected.
Bias Levels
To properly drive the LCD, six (Including VLCD and VSS) different voltage (Bias) levels are generated. The ra-
tios among these levels and VLCD, should be selected according to the MUX ratio (m). They are established to
be (Fig. 14):
V
LCD
n
4
+
n
4
+
Figure 13. Bias level Generator
S1
S0
Multiplication Factor
0
0
2X
0
1
3X
1
0
4X
1
1
5X
-----+
V
LCD
,n
3
2
---+
V
LCD
,
+
n
4
-------------
V
LCD
,
+
n
4
-------------
V
LCD
,V
SS
,
R
V
LCD
V
SS
·V
LCD
·V
LCD
·V
LCD
·V
LCD
n + 3
n + 4
R
nR
R
R
n + 2
n + 4
2
n + 4
1
n + 4
D00IN1150
相關(guān)PDF資料
PDF描述
STE2001DIE2 65 X 128 SINGLE CHIP LCD CONTROLLER / DRIVER
STE2004S M16C; M16C/60 Series; Microcontroller; Bit Size: 32/16-bit CISC; ROM: 320K; RAM: 31K; ROM Type: Mask ROM; CPU: M16C/60 core; Minimum Instruction Execution Time (ns): 41.7 (@24MHz); Operating Frequency / Supply Voltage: 24MHz/3.0 to 5.5V, 10MHz/2.7 to 5.5V; Operating Ambient Temperature (°C): -20 to 85, -40 to 85; Package Code: PLQP0128KB-A (128P6Q-A)
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參數(shù)描述
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