參數(shù)資料
型號: ST72F651AR6T1
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, MICROCONTROLLER, PQFP64
封裝: 10 X 10 MM, ROHS COMPLIANT, TQFP-64
文件頁數(shù): 86/161頁
文件大?。?/td> 2656K
代理商: ST72F651AR6T1
ST72651AR6
30/161
Doc ID 7215 Rev 4
6.3 LOW VOLTAGE DETECTOR (LVD)
To allow the integration of power management
features in the application, the Low Voltage Detec-
tor function (LVD) generates a static reset when
the VDDA supply voltage is below a VIT- reference
value. This means that it secures the power-up as
well as the power-down, keeping the ST7 in reset.
The VIT- reference value for a voltage drop is lower
than the VIT+ reference value for power-on in order
to avoid a parasitic reset when the MCU starts run-
ning and sinks current on the supply (hysteresis).
The LVD Reset circuitry generates a reset when
VDDA is below:
–VIT+ when VDDA is rising
–VIT- when VDDA is falling
The LVD function is illustrated in Figure 21.
During a Low Voltage Detector Reset, the RESET
pin is held low, thus permitting the MCU to reset
other devices.
Note: It is recommended to make sure that the
VDDA supply voltage rises monotonously when the
device is exiting from Reset, to ensure the applica-
tion functions properly.
Figure 21. Low Voltage Detector vs Reset
VDDA
VIT+(LVD)
RESET
VIT-(LVD)
Vhyst
1
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