
Electrical characteristics
ST10F296E
24.7.5
Example of external network sizing
This section provides an example of how to design an external network, based on realistic
values for the internal parameters and on a hypothesis concerning the characteristics of the
analog signal to be sampled.
The following hypothesis is formulated to design the external network on the ADC input pins:
–
Analog signal source bandwidth (f0):
10 kHz
–
Conversion rate (fC):
25 kHz
–
Sampling time (TS):
1 s
–
Pin input capacitance (CP1):
5 pF
–
Pin input routing capacitance (CP2):
1 pF
–
Sampling capacitance (CS):
4 pF
–
Maximum input current injection (IINJ):
3 mA
–
Maximum analog source voltage (VAM): 12 V
–
Analog source impedance (RS):
100
–
Channel switch resistance (RSW):
500
–
Sampling switch resistance (RAD):
200
If designing a filter with the pole at the maximum frequency of the signal, the time constant
Equation 34
Using the relationship between CF and CS (Equation 33) and taking some margin (4000 instead of 2048), it is possible to define CF as shown in Equation 35. Equation 35
Equation 36
Total series resistance can be calculated using
Equation 37 where the current injection
limitation is considered and it is assumed that the source can go up to 12 V.
Equation 37
R
CCF
12
πf
0
()
15.9
s
==
C
F
4000
C
S
×
16nF
==
R
F
12
πf
0CF
()
995
1k
==
R
S
R
F
R
L
++
V
AM
I
INJ
4k
==