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ST10F296E
Real-time clock (RTC)
18
Real-time clock (RTC)
The RTC is an independent timer. It is directly derived from the clock oscillator on XTAL1
(main oscillator) input, so that it can be kept running even in idle or power-down mode (if it is
enabled). Register access is implemented onto the XBus. This module is designed with the
following characteristics:
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Generation of the current time and date for the system
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Cyclic time based interrupt on Port 2 external interrupts every ‘RTC basic clock tick’
and after n ‘RTC basic clock ticks’ if enabled (n is programmable).
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58-bit timer for long-term measurements
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Capability to exit the ST10 chip from power-down mode (if the PWDCFG bit of the
SYSCON register is set) after a programmed delay.
The RTC is based on two main blocks of counters. The first block is a prescaler which
generates a basic reference clock (for example a one-second period). This basic reference
clock comes out of a 20-bit divider (4-bit MSB RTCDH counter and 16-bit LSB RTCDL
counter). The 20-bit divider is driven by an input clock which is derived from the on-chip high
frequency CPU clock and pre-divided by a 1/64 fixed counter (see
Figure 72). The divider is
loaded at each basic reference clock period with the value of the 20-bit prescaler register (4-
bit MSB RTCPH register and 16-bit LSB RTCPL register).
The value of the 20-bit RTCP register determines the period of the basic reference clock. A
timed interrupt request (RTCSI) may be sent on each basic reference clock period. The
second block of the RTC is a 32-bit counter (16-bit RTCH and 16-bit RTCL). This counter
may be initialized with the current system time. The RTCH/RTCL counter is driven with the
basic reference clock signal. To provide an alarm function, the contents of the RTCH/RTCL
counter is compared with a 32-bit alarm register (16-bit RTCAH register and 16-bit RTCAL
register). The alarm register may be loaded with a reference date. An alarm interrupt
request (RTCAI), may be generated when the value of the RTCH/RTCL counter matches
the reference date of the RTCAH/RTCAL register.
The timed RTCSI and the alarm RTCAI interrupt requests can trigger a fast external
interrupt via the EXISEL register of port 2 and can wake-up the ST10 chip when running
power-down mode. Using the RTCOFF bit of the RTCCON register, the user may switch off
the clock oscillator when entering power-down mode.
Since the RTC counter is driven by the main oscillator (powered by the main power supply),
it cannot be maintained running in stand-by mode. The opposite is true in power-down
mode, where the main oscillator can be maintained running to provide the reference to the
RTC module (if not disabled).
Figure 71 below shows the ESFRs and port pins associated with the RTC.