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參數(shù)資料
| 型號： | SST89E564RD-40-I-PJ |
| 廠商： | Silicon Storage Technology, Inc. |
| 英文描述： | FlashFlex51 MCU |
| 中文描述： | FlashFlex51單片機 |
| 文件頁數(shù)： | 8/62頁 |
| 文件大?。?/td> | 680K |
| 代理商： | SST89E564RD-40-I-PJ |
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8
Preliminary Specifications
FlashFlex51 MCU
SST89E564RD / SST89V564RD / SST89E554RC / SST89V554RC
2001 Silicon Storage Technology, Inc.
S71207-00-000
9/01
555
2.1 Pin Descriptions
TABLE
2-1: P
IN
D
ESCRIPTIONS
(1
OF
2)
Symbol
P0[7:0]
Type
1
I/O
Name and Functions
Port 0:
Port 0 is an 8-bit open drain bi-directional I/O port. As an output port each pin can
sink several LS TTL inputs. Port 0 pins float that have “1”s written to them, and in this state
can be used as high-impedance inputs. Port 0 is also the multiplexed low-order address and
data bus during accesses to external memory. In this application, it uses strong internal pull-
ups when transitioning to V
OH
. Port 0 also receives the code bytes during the external host
mode programming, and outputs the code bytes during the external host mode verification.
External pull-ups are required during program verification.
Port 1:
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers
can drive LS TTL inputs. Port 1 pins are pulled high by the internal pull-ups when “1”s are
written to them and can be used as inputs in this state. As inputs, Port 1 pins that are exter-
nally pulled low will source current (I
IL
, see Tables 11-3 and 11-4) because of the internal pull-
ups. P1[5, 6, 7] have high current drive of 16 mA. Port 1 also receives the low-order address
bytes during the external host mode programming and verification.
T2:
External count input to Timer/Counter 2 or Clock-out from Timer/Counter 2
T2EX:
Timer/Counter 2 capture/reload trigger and direction control
ECI:
PCA Timer/Counter External Input:
This signal is the external clock input for the PCS timer/counter.
CEX0:
Compare/Capture Module External I/O
Each compare/capture module connects to a Port 1 pin for external I/O. When not used by
the PCA, this pin can handle standard I/O.
SS#:
Master Input or Slave Output for SPI.
OR
CEX1:
Compare/Capture Module External I/O
MOSI:
Master Output line, Slave Input line for SPI
OR
CEX2:
Compare/Capture Module External I/O
MISO:
Master Input line, Slave Output line for SPI
OR
CEX3:
Compare/Capture Module External I/O
SCK:
Master clock output, slave clock input line for SPI
OR
CEX4:
Compare/Capture Module External I/O
Port 2:
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. Port 2 pins are pulled
high by the internal pull-ups when “1”s are written to them and can be used as inputs in this
state. As inputs, Port 2 pins that are externally pulled low will source current (I
IL
, see Tables
11-3 and 11-4) because of the internal pull-ups. Port 2 sends the high-order address byte
during fetches from external Program memory and during accesses to external Data Memory
that use 16-bit address (MOVX@DPTR). In this application, it uses strong internal pull-ups
when transitioning to V
OH
. Port 2 also receives some control signals and a partial of high-
order address bits during the external host mode programming and verification.
Port 3:
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers
can drive LS TTL inputs. Port 3 pins are pulled high by the internal pull-ups when “1”s are
written to them and can be used as inputs in this state. As inputs, Port 3 pins that are exter-
nally pulled low will source current (I
IL
, see Tables 11-3 and 11-4) because of the internal pull-
ups. Port 3 also receives some control signals and a partial of high-order address bits during
the external host mode programming and verification.
RXD:
Serial input line
TXD:
Serial output line
INT0#:
External Interrupt 0 Input
P1[7:0]
I/O with internal
pull-ups
P1[0]
P1[1]
P1[2]
I/O
I
I
P1[3]
I/O
P1[4]
I/O
P1[5]
I/O
P1[6]
I/O
P1[7]
I/O
P2[7:0]
I/O with internal
pull-ups
P3[7:0]
I/O with internal
pull-ups
P3[0]
P3[1]
P3[2]
I
O
I
相關PDF資料 |
PDF描述 |
|---|---|
| SST89E564RD-40-I-TQI | FlashFlex51 MCU |
| SST89E564RD-40-I-TQJ | FlashFlex51 MCU |
| SST89V554RC | FlashFlex51 MCU |
| SST89V554RC-40-C-NI | FlashFlex51 MCU |
| SST89V554RC-40-C-NJ | FlashFlex51 MCU |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SST89E564RD-40-I-QIF | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex MCU |
| SST89E564RD-40-I-TQI | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
| SST89E564RD-40-I-TQJ | 功能描述:8位微控制器 -MCU 64KB+8KB 40ns RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| SST89E564RD-40-I-TQJE | 功能描述:8位微控制器 -MCU 64KB+8KB 40ns RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| SST89E58 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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