- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365693 > SST29VF020 (Silicon Storage Technology, Inc.) Small-Sector Flash(小扇區(qū)閃速存儲器) PDF資料下載
參數(shù)資料
| 型號： | SST29VF020 |
| 廠商： | Silicon Storage Technology, Inc. |
| 英文描述： | Small-Sector Flash(小扇區(qū)閃速存儲器) |
| 中文描述： | 小部門閃光（小扇區(qū)閃速存儲器） |
| 文件頁數(shù)： | 2/26頁 |
| 文件大?。?/td> | 766K |
| 代理商： | SST29VF020 |
第1頁當(dāng)前第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁
2
Preliminary Specifications
512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Small-Sector Flash
SST29SF512 / SST29SF010 / SST29SF020 / SST29SF040
SST29VF512 / SST29VF010 / SST29VF020 / SST29VF040
2002 Silicon Storage Technology, Inc.
S71160-05-000
2/02
505
Device Operation
Commands are used to initiate the memory operation func-
tions of the device. Commands are written to the device
using standard microprocessor write sequences. A com-
mand is written by asserting WE# low while keeping CE#
low. The address bus is latched on the falling edge of WE#
or CE#, whichever occurs last. The data bus is latched on
the rising edge of WE# or CE#, whichever occurs first.
Read
The Read operation of the SST29SFxxx and SST29VFxxx
devices are controlled by CE# and OE#, both have to be
low for the system to obtain data from the outputs. CE# is
used for device selection. When CE# is high, the chip is
deselected and only standby power is consumed. OE# is
the output control and is used to gate data from the output
pins. The data bus is in high impedance state when either
CE# or OE# is high. Refer to the Read cycle timing dia-
gram for further details (Figure 4).
Byte-Program Operation
The SST29SFxxx and SST29VFxxx devices are pro-
grammed on a byte-by-byte basis. Before programming,
the sector where the byte exists must be fully erased. The
Program operation is accomplished in three steps. The first
step is the three-byte load sequence for Software Data Pro-
tection. The second step is to load byte address and byte
data. During the Byte-Program operation, the addresses
are latched on the falling edge of either CE# or WE#,
whichever occurs last. The data is latched on the rising
edge of either CE# or WE#, whichever occurs first. The
third step is the internal Program operation which is initi-
ated after the rising edge of the fourth WE# or CE#, which-
ever occurs first. The Program operation, once initiated, will
be completed, within 20 μs. See Figures 5 and 6 for WE#
and CE# controlled Program operation timing diagrams
and Figure 16 for flowcharts. During the Program opera-
tion, the only valid reads are Data# Polling and Toggle Bit.
During the internal Program operation, the host is free to
perform additional tasks. Any commands written during the
internal Program operation will be ignored.
Sector-Erase Operation
The Sector-Erase operation allows the system to erase the
device on a sector-by-sector basis. The SST29SFxxx and
SST29VFxxx offer Sector-Erase mode. The sector archi-
tecture is based on uniform sector size of 128 Bytes. The
Sector-Erase operation is initiated by executing a six-byte-
command sequence with Sector-Erase command (20H)
and sector address (SA) in the last bus cycle. The sector
address is latched on the falling edge of the sixth WE#
pulse, while the command (20H) is latched on the rising
edge of the sixth WE# pulse. The internal Erase operation
begins after the sixth WE# pulse. The End-of-Erase opera-
tion can be determined using either Data# Polling or Toggle
Bit methods. See Figure 9 for timing waveforms. Any com-
mands issued during the Sector-Erase operation are
ignored.
Chip-Erase Operation
The SST29SFxxx and SST29VFxxx devices provide a
Chip-Erase operation, which allows the user to erase the
entire memory array to the “1s” state. This is useful when
the entire device must be quickly erased.
The Chip-Erase operation is initiated by executing a six-
byte Software Data Protection command sequence with
Chip-Erase command (10H) with address 555H in the last
byte sequence. The internal Erase operation begins with
the rising edge of the sixth WE# or CE#, whichever occurs
first. During the internal Erase operation, the only valid read
is Toggle Bit or Data# Polling. See Table 4 for the command
sequence, Figure 10 for timing diagram, and Figure 19 for
the flowchart. Any commands written during the Chip-
Erase operation will be ignored.
Write Operation Status Detection
The SST29SFxxx and SST29VFxxx devices provide two
software means to detect the completion of a Write (Pro-
gram or Erase) cycle, in order to optimize the system
Write cycle time. The software detection includes two
status bits: Data# Polling (DQ
7
) and Toggle Bit (DQ
6
).
The End-of-Write detection mode is enabled after the ris-
ing edge of WE# which initiates the internal Program or
Erase operation.
The actual completion of the nonvolatile write is asyn-
chronous with the system; therefore, either a Data# Poll-
ing or Toggle Bit read may be simultaneous with the
completion of the Write cycle. If this occurs, the system
may possibly get an erroneous result, i.e., valid data may
appear to conflict with either DQ
7
or DQ
6
. In order to pre-
vent spurious rejection, if an erroneous result occurs, the
software routine should include a loop to read the
accessed location an additional two (2) times. If both
reads are valid, then the device has completed the Write
cycle, otherwise the rejection is valid.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SST29VF040-55-4C-NHE | 4 Mbit (x8) Small-Sector Flash |
| SST29VF040-55-4C-WHE | 4 Mbit (x8) Small-Sector Flash |
| SST29VF040-55-4I-NHE | 4 Mbit (x8) Small-Sector Flash |
| SST29VF040-55-4I-WHE | 4 Mbit (x8) Small-Sector Flash |
| SST30VR022-500-C-WH | 2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM ROM/RAM Combo |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SST29VF020-70-4C-NHE | 功能描述:閃存 2M (256Kx8) 70ns 2.7-3.6V Commercial RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| SST29VF020-70-4C-WHE | 功能描述:閃存 256K X 8 70ns RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| SST29VF020-70-4I-WHE | 功能描述:閃存 2M (256Kx8) 70ns 2.7-3.6V Industrial RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| SST29VF040-70-4C-NH | 功能描述:閃存 512K X 8 70ns RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| SST29VF040-70-4C-NHE | 功能描述:閃存 512K X 8 70ns RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。