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參數(shù)資料
| 型號(hào)： | SIO10N268 |
| 廠商： | SMSC Corporation |
| 英文描述： | Advenced Notebook I/O for ISA or LPC Designs with X-Bus Interface for I/O, Memory, and FWH Emulation and Four Srial Ports |
| 中文描述： | Advenced筆記本電腦的I / O ISA或設(shè)計(jì)的X LPC總線接口的I / O，內(nèi)存，和FWH仿真和四Srial港口 |
| 文件頁(yè)數(shù)： | 132/251頁(yè) |
| 文件大?。?/td> | 1384K |
| 代理商： | SIO10N268 |
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Advanced Notebook I/O for ISA or LPC Designs
Datasheet
Rev. 0.5 (03-24-05)
Page 134
SMSC SIO10N268
DATASHEET
pins are used for a floppy disk controller; when the pin is high, the parallel port pins are used for a parallel
port. The polarity bit controls the state of the pin.
If the Floppy_PP bits, CR21 bits[1:0]=00 then the pin is not used to switch the parallel port pins between
the FDC and the parallel port, even if the FDC_PP function is selected on GP11. See the Configuration
section for register description.
NOTE:
When the floppy is selected on the parallel port, the parallel port IRQ, SMI and the parallel port DRQ will
not come out of the part.
8.11 Watchdog Timer
The SIO10N268's Watchdog Timer (WDT) has a programmable time-out ranging from 1 to 255 minutes
with one minute resolution, or 1 to 255 seconds with 1 second resolution. The units of the WDT timeout
value are selected via bit[7] of the WDT_TIMEOUT register (Runtime Register at offset 0x11). The WDT
time-out value is set through the WDT_VAL Runtime register. Setting the WDT_VAL register to 0x00
disables the WDT function (this is its power on default). Setting the WDT_VAL to any other non-zero value
will cause the WDT to reload and begin counting down from the value loaded. When the WDT count value
reaches zero the counter stops and sets the Watchdog time-out status bit in the WDT_CTRL Runtime
register. Note: Regardless of the current state of the WDT, the WDT time-out status bit can be directly set
or cleared by the Host CPU.
The Watchdog Timer may be configured to generate an interrupt on the rising edge of the Time-out status
bit. This interrupt can be used to generate an IO_PME#, an IO_SMI#, a signal on the WDT output pin, or it
may be mapped onto the Serial IRQ stream. The following list describes the registers used to enable
these events.
NOTE:
The WDT, PME, and SMI registers are located in the Runtime Register block.
NOTE:
The WDT defaults to generating an active high signal. The polarity of this output may be inverted to
generate an active low signal through bit[1] GP21 located in GPIO Polarity Register 2 at offset CR34.
Four methods of enabling Watchdog Timer interrupt events:
1) The WDT can generate an IO_PME#. If a watchdog timer event occurs the WDT status bit in the
PME_STS2 register at offset 0x03 will be set. If bit[0] PME_En in the PME_En registers at offset
0x01 is set to ‘1’ and bit[7] WDT in the PME_EN2 register at offset 0x06 is set to ‘1’ an interrupt will be
generated on the IO_PME# pin.
2) The WDT can generate an IO_SMI#. If a watchdog timer event occurs the WDT status bit in the
SMI_STS3 register at offset 0x18 will be set. If bits[5:4] GP12 Alternate Function Select in the GPIO
Alternate Function Select Register 1 at offset CR44 are set to ‘01’ and bit[0]EN_WDT in the SMI_EN3
at offset 0x19 is set to ‘1’ an interrupt will be generated on the IO_SMI# pin.
3) The WDT can generate a signal on the GP21/IRTX2/WDT pin. If a watchdog timer event occurs and
bits[3:2] GP21 Alternate Function Select in the GPIO Alternate Function Select Register 3 at offset
CR46 are set to ‘10’ an interrupt will be generated on the WDT pin.
4) The WDT can generate an interrupt on the Serial IRQ stream. If a watchdog timer event occurs and
bits[7:4] WDT Interrupt Mapping located in the WDT_CFG register at offset 0x13 are programmed to a
value other than ‘0000’ an interrupt will be generated on the SER_IRQ output pin. See section 8.14
Serial IRQ on page 138 for a description of generating interrupts on the SER_IRQ pin.
The host may force a Watchdog time-out to occur by writing a "1" to bit 2 of the WDT_CTRL (Force WD
Time-out) Runtime register. Writing a "1" to this bit forces the WDT count value to zero and sets bit 0 of
the WDT_CTRL (Watchdog Status). Bit 2 of the WDT_CTRL is self-clearing.
See Chapter 9 Runtime Registers for description of these registers.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SIO10N268-NU | 功能描述:板上安裝溫度傳感器 Notebk I/O Contrllr RoHS:否 制造商:Omron Electronics 輸出類(lèi)型:Digital 配置: 準(zhǔn)確性:+/- 1.5 C, +/- 3 C 溫度閾值: 數(shù)字輸出 - 總線接口:2-Wire, I2C, SMBus 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 最大工作溫度:+ 50 C 最小工作溫度:0 C 關(guān)閉: 安裝風(fēng)格: 封裝 / 箱體: 設(shè)備功能:Temperature and Humidity Sensor |
| SIO665GT | 功能描述:界面開(kāi)發(fā)工具 Evaluation Board RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V |
| SIO666GT | 功能描述:界面開(kāi)發(fā)工具 Evaluation Board RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V |
| SIO669 | 功能描述:界面開(kāi)發(fā)工具 Evaluation Board RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V |
| SIOLS1000V2 | 制造商:SECELECTRONICS 制造商全稱(chēng):SECELECTRONICS 功能描述:Current Sensors |
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