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參數(shù)資料
| 型號： | SI5366-C-GQR |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 16/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK MULTIPLIER PREC 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 系列： | DSPLL® |
| 類型： | 時鐘放大器，振動衰減器 |
| PLL： | 是 |
| 輸入： | 時鐘 |
| 輸出： | CML，CMOS，LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 4:5 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 1.05GHz |
| 除法器/乘法器： | 無/是 |
| 電源電壓： | 1.71 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 帶卷 (TR) |
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Si5366
Rev. 1.0
23
80
95
SFOUT1
SFOUT0
I
3-Level
Signal Format Select.
Three level inputs that select the output signal format (common
mode voltage and differential swing) for all of the clock outputs
except FS_OUT. See DBL_FS pin descripition.
Bypass mode is not supported with CMOS outputs. These pins
have both weak pull-ups and weak pull-downs and default to
M. Some designs may require an external resistor voltage
divider when driven by an active device that will tri-state.
82
83
CKOUT1–
CKOUT1+
OMULTI
Clock Output 1.
Differential output clock with a frequency specified by FRQSEL
and FRQTBL. Output signal format is selected by SFOUT pins.
Output is differential for LVPECL, LVDS, and CML compatible
modes. For CMOS format, both output pins drive identical sin-
gle-ended clock outputs.
85
DBL34
I
LVCMOS
Output 3 and 4 Disable.
Active high input. When active, entire CKOUT3 and CKOUT4
divider and output buffer path is powered down. CKOUT3 and
CKOUT4 outputs will be in tristate mode during powerdown.
This pin has a weak pull-up.
87
88
FS_OUT–
FS_OUT+
OMULTI
Frame Sync Output.
Differential 8 kHz frame sync output or fifth high-speed clock
output with a frequency specified by FRQSEL and FRQTBL.
Output signal format is selected by SFOUT pins. Detailed oper-
ations and timing characteristics for this pin may be found in
the Any-Frequency Precision Clock Family Reference Manual.
Output is differential for LVPECL, LVDS, and CML compatible
modes. For CMOS format, both output pins drive identical sin-
gle-ended clock outputs.
92
93
CKOUT2+
CKOUT2–
OMULTI
Clock Output 2.
Differential output clock with a frequency specified by FRQSEL
and FRQTBL. Output signal format is selected by SFOUT pins.
Output is differential for LVPECL, LVDS, and CML compatible
modes. For CMOS format, both output pins drive identical sin-
gle-ended clock outputs.
Table 8. Si5366 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
SFOUT[1:0]
Signal Format
HH
Reserved
HM
LVDS
HL
CML
MH
LVPECL
MM
Reserved
ML
LVDS—Low Swing
LH
CMOS
LM
Disabled
LL
Reserved
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI5366-EVB | 制造商:Silicon Laboratories Inc 功能描述: |
| SI5367 | 制造商:SILABS 制造商全稱:SILABS 功能描述:レP-PROGRAMMABLE PRECISION CLOCK MULTIPLIER |
| Si5367/68-EVB | 功能描述:時鐘和定時器開發(fā)工具 Si5367/Si5368 EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| Si5367A-B-GQ | 功能描述:時鐘合成器/抖動清除器 uP-PROGRAMMABE CLK MULT 10 MHZ-1.4 GHZ RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SI5367A-B-GQR | 制造商:Silicon Laboratories Inc 功能描述: |
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