參數(shù)資料
型號(hào): SI5338K-A-GM
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 26/44頁(yè)
文件大?。?/td> 0K
描述: IC CLK GEN I2C BUS PROG 24QFN
標(biāo)準(zhǔn)包裝: 490
系列: MultiSynth™
類型: *
PLL:
輸入: CML,HCSL,HSCL,LVDS,LVPECL,晶體
輸出: CMOS,HCSL. HSTL. LVDS. LVPECL. SSTL
電路數(shù): 1
比率 - 輸入:輸出: 1:4
差分 - 輸入:輸出: 是/是
頻率 - 最大: 700MHz
除法器/乘法器: 是/是
電源電壓: 1.71 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 24-QFN(4x4)
包裝: 托盤(pán)
Si5338
32
Rev. 1.3
7. Pin Descriptions
Note: Center pad must be tied to GND for normal operation.
Table 16. Si5338 Pin Descriptions
Pin #
Pin Name
I/O
Signal Type
Description
1,2
IN1/IN2
I
Multi
CLKIN/CLKINB.
These pins are used as the main differential clock input or as the
Figure 4, for connection details. Clock inputs to these pins must be
ac-coupled. Keep the traces from pins 1,2 to the crystal as short as
possible and keep other signals and radiating sources away from
the crystal.
When not in use, leave IN1 unconnected and IN2 connected to
GND.
IN1
CLK2B
CLK2A
VDDO2
VDDO1
CLK1B
CLK1A
VDD
SCL
CLK3A
CL
K
3
B
INTR
SDA
VDDO0
CLK0B
CL
K
0
A
RSVD_G
ND
VDDO3
GND
Pad
5
4
3
2
1
6
13
10
9
8
7
IN2
IN3
IN4
IN5
IN6
Top View
11
12
15
14
16
17
18
19
20
21
22
23
24
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