CKOVCM CML 100 load line-to- line —V
參數(shù)資料
型號(hào): SI5319C-C-GM
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 47/50頁(yè)
文件大?。?/td> 0K
描述: IC CLOCK MULT/ATTENUATOR 36QFN
標(biāo)準(zhǔn)包裝: 490
系列: DSPLL®
類型: 時(shí)鐘/頻率倍增器,抖動(dòng)衰減器,多路復(fù)用器
PLL:
主要目的: 以太網(wǎng),SONET/SDH
輸入: 時(shí)鐘,晶體
輸出: CML,CMOS,LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:1
差分 - 輸入:輸出: 是/是
頻率 - 最大: 346MHz
電源電壓: 1.71 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 36-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 36-QFN(6x6)
包裝: 托盤
Si5319
6
Rev. 1.0
Common Mode Output
Voltage
CKOVCM
CML 100
load line-to-
line
—VDD – 0.36
V
Differential Output
Voltage
CKOVD
LVDS
100
load line-to-line
500
700
900
mVPP
Low Swing LVDS
100
load line-to-line
350
425
500
mVPP
Common Mode Output
Voltage
CKOVCM
LVDS 100
load line-
to-line
1.125
1.2
1.275
V
Differential Output
Resistance
CKORD
CML, LVPECL, LVDS
200
Output Voltage Low
CKOVOLLH
CMOS
0.4
V
Output Voltage High
CKOVOHLH
VDD = 1.71 V
CMOS
0.8 x VDD
——
V
Output Drive Current
(CMOS driving into
CKOVOL for output low
or CKOVOH for output
high. CKOUT+ and
CKOUT– shorted
externally)
CKOIO
ICMOS[1:0] =11
VDD =1.8 V
—7.5
mA
ICMOS[1:0] =10
VDD =1.8 V
—5.5
mA
ICMOS[1:0] =01
VDD =1.8 V
—3.5
mA
ICMOS[1:0] =00
VDD =1.8 V
—1.75
mA
ICMOS[1:0] =11
VDD =3.3 V
—32
mA
ICMOS[1:0] =10
VDD =3.3 V
—24
mA
ICMOS[1:0] =01
VDD =3.3 V
—16
mA
ICMOS[1:0] =00
VDD =3.3 V
—8
mA
Table 2. DC Characteristics (Continued)
(VDD = 1.8 ± 5%, 2.5 ±10%, or 3.3 V ±10%, TA = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Notes:
1.
Current draw is independent of supply voltage.
2.
No under- or overshoot is allowed.
3.
LVPECL outputs require nominal VDD ≥ 2.5 V.
4.
This is the amount of leakage that the 3-level inputs can tolerate from an external driver. See Si53xx Family
Reference Manual for more details.
5.
LVPECL, CML, LVDS and low-swing LVDS measured with Fo = 622.08 MHz.
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