參數(shù)資料
型號: SI3220PPT0-EVB
廠商: Silicon Laboratories Inc
文件頁數(shù): 11/112頁
文件大小: 0K
描述: BOARD EVAL W/SI3200 INTERFACE
標(biāo)準(zhǔn)包裝: 1
系列: ProSLIC®
主要目的: 接口,模擬前端(AFE)
已用 IC / 零件: Si3220
已供物品: 板,CD
Si3220/25 Si3200/02
108
Rev. 1.3
Not
Recommended
fo
r N
ew
D
esi
gn
s
7. Package Outline: 16-Pin ESOIC
Figure 66 illustrates the package details for the Si3200/2. Table 54 lists the values for the dimensions shown in the
illustration.
Figure 66. 16-Pin Thermal Enhanced Small Outline Integrated Circuit (ESOIC) Package
Table 54. Package Diagram Dimensions
Symbol
Millimeters
Min
Max
A
1.35
1.75
A1
0
0.15
B.33
.51
C.19
.25
D
9.80
10.00
E
3.80
4.00
e
1.27 BSC
H
5.80
6.20
h.25
.50
L
.40
1.27
—0.10
0
8
E
H
A1
B
C
h
L
e
See Detail F
Detail F
A
16
9
8
1
GAUGE PLANE
0.010
D
Seating Plane
Bottom Side
Exposed Pad
2.3 x 3.6 mm
Weight: Approximate device weight is 0.15 grams.
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