參數(shù)資料
型號(hào)： SI3056DC-EVB
廠商： Silicon Laboratories Inc
文件頁(yè)數(shù)： 26/94頁(yè)
文件大?。?/td> 0K
描述： DAUGHTERCARD DAA SI3056/SI3018
標(biāo)準(zhǔn)包裝： 1
主要目的： 電信，數(shù)據(jù)采集裝置（DAA）
已用 IC / 零件： Si3056
已供物品： 板，CD
Si3056
Si3018/19/10
32
Rev. 1.05
Figure 22. Billing Tone Filter
L1 must carry the entire loop current. The series
resistance of the inductors is important to achieve a
narrow and deep notch. This design has more than
25 dB of attenuation at both 12 kHz and 16 kHz.
The billing tone filter affects the ac termination and
return loss. The global complex ac termination
(ACIM = 1111) passes global return loss specifications
with and without the billing tone filter by at least 3 dB.
5.20. On-Hook Line Monitor
The on-hook line monitor mode allows the Si3056 to
receive line activity when in an on-hook state. A low-
power ADC located on the line-side device digitizes the
signal passed across the RNG1/2 pins and then sends
the signal digitally across the communications link to the
host. This mode is typically used to detect caller ID data
and is enabled by setting the ONHM bit (Register 5,
bit 3). Caller ID data can be gained up or attenuated
using the receive gain control bits in registers 39 and
41.
5.21. Caller ID
The Si3056 can pass caller ID data from the phone line
to a caller ID decoder connected to the serial port.
5.21.1. Type I Caller ID
Type I Caller ID sends the CID data while the phone is
on-hook.
In systems where the caller ID data is passed on the
phone line between the first and second rings, utilize the
following method to capture the caller ID data:
1. After identifying a ring signal using one of the
methods described in "5.14.Ring Detection" on page
29, determine when the first ring is complete.
2. Assert the ONHM bit (Register 5, bit 3) to enable
caller ID data detection. The caller ID data passed
across the RNG 1/2 pins is presented to the host via
the SDO pin.
3. Clear the ONHM bit after the caller ID data is
received.
In systems where the caller ID data is preceded by a
line polarity (battery) reversal, use the following method
to capture the caller ID data:
1. Enable full wave rectified ring detection (RFWE,
Register 18, bit 1).
2. Monitor the RDTP and RDTN register bits (or the
POLI bit) to identify whether a polarity reversal or
ring signal has occurred. A polarity reversal trips
either the RDTP or RDTN ring detection bits, and
thus the full-wave ring detector must be used to
distinguish a polarity reversal from a ring. The lowest
specified ring frequency is 15 Hz; therefore, if a
battery reversal occurs, the DSP should wait a
minimum of 40 ms to verify that the event observed
is a battery reversal and not a ring signal. This time
is greater than half the period of the longest ring
signal. If another edge is detected during this 40 ms
pause, this event is characterized as a ring signal
and not a battery reversal.
3. Assert the ONHM bit (Register 5, bit 3) to enable the
caller ID data detection. The caller ID data passed
across the RNG 1/2 pins is presented to the host via
the SDO pin.
4. Clear the ONHM bit after the caller ID data is
received.
5.21.2. Type II Caller ID
Type II Caller ID sends the CID data while the phone is
off-hook and is often referred to as caller ID/call waiting
(CID/CW). To receive the CID data while off-hook, use
the following procedure (see Figure 23):
1. The Caller Alert Signal (CAS) tone is sent from the
Central Office (CO) and is digitized along with the
Table 19. Component Values—Optional Billing
Tone Filters
Symbol
Value
C1,C2
0.027 F, 50 V, ±10%
C3
0.01 F, 250 V, ±10%
L1
3.3 mH, >120 mA, <10
, ±10%
L2
10 mH, >40 mA, <10
, ±10%
L2
C3
RING
TIP
From
Line
To
DAA
C1
C2
L1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
Si3056-D-FS 功能描述:電信線路管理 IC Si3056 DAA System Side SSI Interface RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
SI3056-D-FSR 功能描述:電信線路管理 IC Si3056 DAA System Side SSI Interface RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
SI3056-D-ZS3R 制造商:Silicon Laboratories Inc 功能描述:MODEM CHIP CHIPSET 56KBPS - Tape and Reel
SI3056-F-FS 制造商:Silicon Laboratories Inc 功能描述:
SI3056-FS 功能描述:IC SYSTEM-SIDE DAA 16SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 調(diào)制解調(diào)器 - IC 和模塊 系列:- 標(biāo)準(zhǔn)包裝:25 系列:- 數(shù)據(jù)格式:V.21，V.22，V.23，V.29，V.32，V.34，V.90，V.92，Bell 103，Bell 212A 波特率:33.6k 電源電壓:3.3V 安裝類型:- 封裝/外殼:- 供應(yīng)商設(shè)備封裝:- 包裝:托盤 配用:591-1013-ND - KIT DEV SOCKETMODEM PARALLEL591-1009-ND - KIT DEV SRL SOCKETMODEM UNIVERSL 其它名稱:MT5656SMI-P-V-34.R2-SPMT5656SMI-P-V-34.R2-SP-NDQ4711574
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