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參數(shù)資料
| 型號： | SCAN921226SLC |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 30-80 MHz 10 Bit Bus LVDS Serializer and Deserializer with IEEE 1149.1 (JTAG) and at-speed BIST |
| 中文描述： | LINE RECEIVER, PBGA49 |
| 封裝： | FBGA-49 |
| 文件頁數(shù)： | 5/21頁 |
| 文件大?。?/td> | 474K |
| 代理商： | SCAN921226SLC |
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
LVCMOS/LVTTL Input
Voltage
LVCMOS/LVTTL Output
Voltage
Bus LVDS Receiver Input
Voltage
Bus LVDS Driver Output
Voltage
Bus LVDS Output Short
Circuit
Duration
Junction Temperature
Storage Temperature
Lead Temperature
(Soldering, 4 seconds)
Maximum Package Power Dissipation Capacity
@
25C Package:
49L BGA
Package Derating:
0.3V to +4V
0.3V to (V
CC
+0.3V)
0.3V to (V
CC
+0.3V)
0.3V to +3.9V
0.3V to +3.9V
10mS
+150C
65C to +150C
+220C
1.47 W
49L BGA
θ
ja
ESD Rating
HBM
MM
11.8 mW/C above
+25C
85C/W
>
2kV
>
250V
Recommended Operating
Conditions
Min
3.0
Nom
3.3
Max
3.6
Units
V
Supply Voltage (V
CC
)
Operating Free Air
Temperature (T
A
)
Receiver Input Range
Supply Noise Voltage
(V
CC
)
40
+25
+85
C
0
2.4
V
100 mV
P-P
Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
SERIALIZER LVCMOS/LVTTL DC SPECIFICATIONS (apply to DIN0-9, TCLK, PWRDN, TCLK_R/F, SYNC1, SYNC2, DEN)
V
IH
High Level Input Voltage
V
IL
Low Level Input Voltage
V
CL
Input Clamp Voltage
I
CL
= 18 mA
I
IN
Input Current
V
IN
= 0V or 3.6V
DESERIALIZER LVCMOS/LVTTL DC SPECIFICATIONS (apply to pins PWRDN, RCLK_R/ F, REN, REFCLK = inputs; apply to
pins ROUT, RCLK, LOCK = outputs)
V
IH
High Level Input Voltage
V
IL
Low Level Input Voltage
V
CL
Input Clamp Voltage
I
CL
= 18 mA
I
IN
Input Current
V
IN
= 0V or 3.6V
V
OH
High Level Output Voltage
I
OH
= 9 mA
V
OL
Low Level Output Voltage
I
OL
= 9 mA
I
OS
Output Short Circuit Current
VOUT = 0V
I
OS
Output Short Circuit Current,
TDO output
I
OZ
TRI-STATE Output Current
PWRDN or REN = 0.8V, V
OUT
= 0V or VCC
SERIALIZER Bus LVDS DC SPECIFICATIONS (apply to pins DO+ and DO)
V
OD
Output Differential Voltage
(DO+)–(DO)
V
OD
Output Differential Voltage
Unbalance
V
OS
Offset Voltage
V
OS
Offset Voltage Unbalance
I
OS
Output Short Circuit Current
D0 = 0V, DIN = High,PWRDN and DEN = 2.4V
I
OZ
TRI-STATE Output Current
PWRDN or DEN = 0.8V, DO = 0V or VCC
I
OX
Power-Off Output Current
VCC = 0V, DO=0V or 3.6V
Conditions
Min
Typ
Max
Units
2.0
GND
V
CC
0.8
1.5
+10
V
V
V
μA
-0.86
±
1
10
2.0
GND
V
CC
0.8
1.5
+15
V
CC
0.5
85
-100
V
V
V
μA
V
V
mA
mA
0.62
±
1
3.0
0.25
47
-70
10
2.2
GND
15
-15
10
±
0.1
+10
μA
RL = 27
, Figure 17
200
290
mV
35
mV
1.05
1.1
4.8
56
±
1
±
1
1.3
35
90
+10
+25
V
mV
mA
μA
μA
10
20
S
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