參數(shù)資料
型號(hào): SC16C850IBS
廠商: NXP Semiconductors N.V.
元件分類: 收發(fā)器
英文描述: 2.5 V to 3.3 V UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and 16 mode or 68 mode parallel bus interface
封裝: SC16C850IBS<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;SC16C850IBS<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<
文件頁(yè)數(shù): 35/55頁(yè)
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代理商: SC16C850IBS
SC16C850
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NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 11 November 2010
35 of 55
NXP Semiconductors
SC16C850
2.5 to 3.3 V UART with 128-byte FIFOs and IrDA encoder/decoder
7.20 RS-485 Turn-around time delay (RS485TIME)
The value in this register controls the turn-around time of the external line transceiver in
bit time. In automatic 9-bit mode RTS or DTR pin is used to control the direction of the line
driver, after the last bit of data has been shifted out of the transmit shift register the UART
will count down the value in this register. When the count value reaches zero, the UART
will assert RTS or DTR pin (logic 0) to turn the external RS-485 transceiver around for
receiving.
Table 30.
Bit
7:0
7.21 Advanced Feature Control Register 2 (AFCR2)
Table 31.
Bit
7:6
5
RS-485 programmable turn-around time register bits description
Symbol
Description
RS485TIME[7:0]
External RS-485 transceiver turn-around time delay. The value
represents the bit time at the programmed baud rate.
Advanced Feature Control Register 2 register bits description
Symbol
Description
AFCR2[7:6]
reserved
AFCR2[5]
RTSInvert. Invert RTS or DTR signal in automatic 9-bit mode.
logic 0 = RTS or DTR is set to 0 by the UART during transmission,
and to 1 during reception
logic 1 = RTS or DTR is set to 1 by the UART during transmission,
and to 0 during reception
AFCR2[4]
RTSCon. Enable the transmitter to control RTS or DTR pin in
automatic 9-bit mode.
logic 0 = transmitter does not control RTS or DTR pin
logic 1 = transmitter controls RTS or DTR pin
AFCR2[3]
RS485 RTS/DTR. Select RTS or DTR pin to control the external
transceiver.
logic 0 = RTS pin is used to control the external transceiver
logic 1 = DTR pin is used to control the external transceiver
AFCR2[2]
TXDisable. Disable transmitter
logic 0 = transmitter is enabled
logic 1 = transmitter is disabled
AFCR2[1]
RXDisable. Disable receiver
logic 0 = receiver is enabled
logic 1 = receiver is disabled
AFCR2[0]
9-bitMode. Enable 9-bit mode or Multidrop (RS-485) mode
logic 0 = normal RS-232 mode
logic 1 = enable 9-bit mode
4
3
2
1
0
相關(guān)PDF資料
PDF描述
SC16C850IET 2.5 V to 3.3 V UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and 16 mode or 68 mode parallel bus interface
SC16C850LIB 1.8 V single UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode parallel bus interface
SC16C850LIBS 1.8 V single UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode parallel bus interface
SC16C850LIET 1.8 V single UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode parallel bus interface
SC16C850SVIBS 1.8 V single UART, 20 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface
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SC16C850IBS/Q900,528 制造商:NXP Semiconductors 功能描述:Cut Tape 制造商:NXP Semiconductors 功能描述:0