參數(shù)資料
型號: SC16C850IBS
廠商: NXP Semiconductors N.V.
元件分類: 收發(fā)器
英文描述: 2.5 V to 3.3 V UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and 16 mode or 68 mode parallel bus interface
封裝: SC16C850IBS<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;SC16C850IBS<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<
文件頁數(shù): 31/55頁
文件大小: 394K
代理商: SC16C850IBS
SC16C850
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Product data sheet
Rev. 2 — 11 November 2010
31 of 55
NXP Semiconductors
SC16C850
2.5 to 3.3 V UART with 128-byte FIFOs and IrDA encoder/decoder
7.9 Extra Feature Control Register (EFCR)
This is a write-only register, and it allows the software access to these registers: ‘first extra
feature register set’, ‘second extra feature register set’, Transmit FIFO Level Counter
(TXLVLCNT), and Receive FIFO Level Counter (RXLVLCNT).
Table 22.
Bit
7:3
2:1
Remark:
EFCR[2:1] has higher priority than EFCR[0]. TXLVLCNT and RXLVLCNT can
only be accessed if EFCR[2:1] are zeroes.
7.10 Scratchpad Register (SPR)
The SC16C850 provides a temporary data register to store 8 bits of user information.
7.11 Divisor Latch (DLL and DLM)
These are two 8-bit registers which store the 16-bit divisor for generation of the baud clock
in the baud rate generator. DLM, stores the most significant part of the divisor. DLL stores
the least significant part of the divisor.
7.12 Transmit FIFO Level Count (TXLVLCNT)
This register is a read-only register. It reports the number of spaces available in the
transmit FIFO.
7.13 Receive FIFO Level Count (RXLVLCNT)
This register is a read-only register. It reports the fill level of the receive FIFO (the number
of characters in the RX FIFO).
Extra Feature Control Register bits description
Symbol
Description
EFCR[7:3]
reserved
EFCR[2:1]
Enable Extra Feature Control bits
00 = General register set is accessible
01 = First extra feature register set is accessible
10 = Second extra feature register set is accessible
11 = reserved
EFCR[0]
Enable TXLVLCNT and RXLVLCNT access
0 = TXLVLCNT and RXLVLCNT are disabled
1 = TXLVLCNT and RXLVLCNT are enabled and can be read.
0
相關(guān)PDF資料
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SC16C850IET 2.5 V to 3.3 V UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and 16 mode or 68 mode parallel bus interface
SC16C850LIB 1.8 V single UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode parallel bus interface
SC16C850LIBS 1.8 V single UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode parallel bus interface
SC16C850LIET 1.8 V single UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode parallel bus interface
SC16C850SVIBS 1.8 V single UART, 20 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface
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SC16C850IBS/Q900,528 制造商:NXP Semiconductors 功能描述:Cut Tape 制造商:NXP Semiconductors 功能描述:0