參數(shù)資料
型號(hào)： SC16C650BIN40,112
廠商： NXP Semiconductors
文件頁數(shù)： 20/48頁
文件大?。?/td> 0K
描述： IC UART SINGLE W/FIFO 40-DIP
標(biāo)準(zhǔn)包裝： 9
通道數(shù)： 1，UART
FIFO's： 32 字節(jié)
電源電壓： 2.5V，3.3V，5V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 通孔
封裝/外殼： 40-DIP（0.600"，15.24mm）
供應(yīng)商設(shè)備封裝： 40-DIP
包裝： 管件
其它名稱： 568-2045-5
935274389112
SC16C650BIN40
SC16C650B_4
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 14 September 2009
27 of 48
NXP Semiconductors
SC16C650B
UART with 32-byte FIFOs and IrDA encoder/decoder
7.9 Scratchpad Register (SPR)
The SC16C650B provides a temporary data register to store 8 bits of user information.
7.10 Enhanced Feature Register (EFR)
Enhanced features are enabled or disabled using this register.
Bits 0 through 4 provide single or dual character software ow control selection. When the
Xon1 and Xon2 and/or Xoff1 and Xoff2 modes are selected, the double 8-bit words are
concatenated into two sequential numbers.
Table 22.
Enhanced Feature Register bits description
Bit
Symbol
Description
7
EFR[7]
Automatic CTS ow control.
logic 0 = Automatic CTS ow control is disabled (normal default condition)
logic 1 = enable Automatic CTS ow control. Transmission will stop when
CTS goes to a logic 1. Transmission will resume when the CTS pin returns to
a logic 0.
6
EFR[6]
Automatic RTS ow control. Automatic RTS may be used for hardware ow
control by enabling EFR[6]. When Auto-RTS is selected, an interrupt will be
generated when the receive FIFO is lled to the programmed trigger level and
RTS will go to a logic 1 at the next trigger level. RTS will return to a logic 0 when
data is unloaded below the next lower trigger level (programmed trigger level 1).
The state of this register bit changes with the status of the hardware ow
control. RTS functions normally when hardware ow control is disabled.
0 = Automatic RTS ow control is disabled (normal default condition)
1 = enable Automatic RTS ow control
5
EFR[5]
Special Character Detect.
logic 0 = special character detect disabled (normal default condition)
logic 1 = special character detect enabled. The SC16C650B compares each
incoming receive character with Xoff2 data. If a match exists, the received
data will be transferred to FIFO and ISR[4] will be set to indicate detection of
special character. Bit 0 in the X-registers corresponds with the LSB bit for the
receive character. When this feature is enabled, the normal software ow
control must be disabled (EFR[3:0] must be set to a logic 0).
4
EFR[4]
Enhanced function control bit. The content of IER[7:4], ISR[5:4], FCR[5:4], and
MCR[7:5] can be modied and latched. After modifying any bits in the
enhanced registers, EFR[4] can be set to a logic 0 to latch the new values. This
feature prevents existing software from altering or overwriting the SC16C650B
enhanced functions.
logic 0 = disable (normal default condition)
logic 1 = enable
3:0
EFR[3:0]
Cont-3:0 Tx, Rx control. Logic 0 or cleared is the default condition.
Combinations of software ow control can be selected by programming these
bits. See Table 23.
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參數(shù)描述
SC16C652 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual UART with 32 bytes of transmit and receive FIFOs
SC16C652B 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:5V, 3.3 V and 2.5V dual UART, 5 Mbit/s (max.),with 32-byte FIFOs and infrared(IrDA) encoder/decoder
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SC16C652BIB48,128 功能描述:UART 接口集成電路 16CB 2.5V-5V 2CH RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C652BIB48,151 功能描述:UART 接口集成電路 2CH. UART 32B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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