參數(shù)資料
型號(hào)： SC16C2550B
廠商： NXP Semiconductors N.V.
英文描述： 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
中文描述： 5伏，3.3伏和2.5伏兆5雙UART /秒（最大），16字節(jié)的FIFO
文件頁數(shù)： 7/42頁
文件大?。?/td> 200K
代理商： SC16C2550B
Philips Semiconductors
SC16C2550B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
Product data
Rev. 02 — 14 December 2004
7 of 42
9397 750 14449
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
INTA,
INTB
30, 29 33, 32
30, 29
O
Interrupt A, B (3-State).
This function is associated with individual channel
interrupts, INTA, INTB. INTA, INTB are enabled when MCR bit 3 is set to a
logic 1, interrupts are enabled in the interrupt enable register (IER), and is
active when an interrupt condition exists. Interrupt conditions include:
receiver errors, available receiver buffer data, transmit buffer empty, or
when a modem status flag is detected.
Read strobe (Active-LOW strobe).
A logic 0 transition on this pin will load
the contents of an internal register defined by address bits A0-A2 onto the
SC16C2550B data bus (D0-D7) for access by external CPU.
Write strobe (Active-LOW strobe).
A logic 0 transition on this pin will
transfer the contents of the data bus (D0-D7) from the external CPU to an
internal register that is defined by address bits A0-A2.
Output 2 (user-defined).
This function is associated with individual
channels, A through B. The state at these pin(s) are defined by the user
and through MCR register bit 3. INTA, INTB are set to the active mode and
OP2 to logic 0 when MCR[3] is set to a logic 1. INTA, INTB are set to the
3-State mode and OP2 to a logic 1 when MCR[3] is set to a logic 0. See
bit 3, Modem Control Register (MCR[3]). Since these bits control both the
INTA, INTB operation and OP2 outputs, only one function should be used
at one time, INT or OP2.
Reset (Active-HIGH).
A logic 1 on this pin will reset the internal registers
and all the outputs. The UART transmitter output and the receiver input will
be disabled during reset time. (See
Section 7.10 “SC16C2550B external
reset condition”
for initialization details.)
Receive Ready A, B (Active-LOW).
This function is associated with
PLCC44 and LQFP48 packages only. This function provides the
RX FIFO/RHR status for individual receive channels (A-B). RXRDYn is
primarily intended for monitoring DMA mode 1 transfers for the receive data
FIFOs. A logic 0 indicates there is a receive data to read/upload, i.e.,
receive ready status with one or more RX characters available in the
FIFO/RHR. This pin is a logic 1 when the FIFO/RHR is empty or when the
programmed trigger level has not been reached. This signal can also be
used for single mode transfers (DMA mode 0).
Transmit Ready A, B (Active-LOW).
This function is associated with
PLCC44 and LQFP48 packages only. These outputs provide the
TX FIFO/THR status for individual transmit channels (A-B). TXRDYn is
primarily intended for monitoring DMA mode 1 transfers for the transmit
data FIFOs. An individual channel’s TXRDYA, TXRDYB buffer ready status
is indicated by logic 0, i.e., at lease one location is empty and available in
the FIFO or THR. This pin goes to a logic 1 (DMA mode 1) when there are
no more empty locations in the FIFO or THR. This signal can also be used
for single mode transfers (DMA mode 0).
Power supply input.
Crystal or external clock input.
Functions as a crystal input or as an
external clock input. A crystal can be connected between this pin and
XTAL2 to form an internal oscillator circuit. Alternatively, an external clock
can be connected to this pin to provide custom data rates. (See
Section 6.5
“Programmable baud rate generator”
.) See
Figure 5
.
IOR
21
24
19
I
IOW
18
20
15
I
OP2A,
OP2B
31, 13 35, 15
32, 9
O
RESET
35
39
36
I
RXRDYA,
RXRDYB
-
34, 23
31, 18
O
TXRDYA,
TXRDYB
-
1, 12
43, 6
O
V
CC
XTAL1
40
16
44
18
42
13
I
I
Table 2:
Symbol
Pin description
…continued
Pin
DIP40 PLCC44 LQFP48
Type Description
相關(guān)PDF資料
PDF描述
SC16C2550BIN40 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
SC16C2550IA44 Dual UART with 16 bytes of transmit and receive FIFOs and infrared (IrDA) encoder/decoder
SC16C2550IN40 Dual UART with 16 bytes of transmit and receive FIFOs and infrared (IrDA) encoder/decoder
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SC16C2550IB48 Dual UART with 16 bytes of transmit and receive FIFOs and infrared (IrDA) encoder-decoder
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SC16C2550B_07 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
SC16C2550BIA44 功能描述:UART 接口集成電路 16CB 2.5V-5V 2CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C2550BIA44,512 功能描述:UART 接口集成電路 16CB 2.5V-5V 2CH RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C2550BIA44,518 功能描述:UART 接口集成電路 2CH. UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C2550BIA44,518-CUT TAPE 制造商:NXP 功能描述:SC16C2550B 5 V 3.3 V and 2.5 V Dual UART 5 Mbit/s w/ 16-byte FIFOs - PLCC44
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