
C165UTAH
External Bus Interface
Data Sheet
210
2001-02-23
core. The XBUS is an internal representation of the external bus interface, ie. it is
operated in the same way.
The current XBUS interface is prepared to support up to 3 X-Peripherals.
For each peripheral on the XBUS (X-Peripheral) there is a separate address window
controlled by an XBCON and an XADRS register. As an interface to a peripheral in many
cases is represented by just a few registers, the XADRS registers select smaller address
windows than the standard ADDRSEL registers. As the register pairs control integrated
peripherals rather than externally connected ones, they are fixed by mask programming
rather than being user programmable.
X-Peripheral accesses provide the same choices as external accesses, so these
peripherals may be bytewide or wordwide, with or without a separate address bus.
Interrupt nodes and configuration pins (on PORT0) are provided for X-Peripherals to be
integrated.
10.8
Initialization of the C165UTAH’s X-peripherals
The following registers must be set for initialization of the C165UTAH X-peripherals:
XPERCON-Register (Addr. F024, default: 0000):
Bit 5:
'1': IOM-2 active
Bit 6:
'1': USB module active '0': USB module switched-off
Bit 7:
'1': EPEC active
'0': IOM-2 switched-off
'0': EPEC switched-off
SYSCON-Register (Addr. FF12, default: 0xx0):
Bit 2:
'1': X-Peripherals enable
Bit 1:
'1': X-Per accesses visible at externalXBUS'0': X-Per accesses not visible
'0': X-Peripherals disable
SYSCON3-Register (Addr. F1D4, default: 0000):
Bit 15:
'1': All peripheral clocks disabled
'0': Individual disable control by
bits 14 thru 0
Bit 12:11: '00': USB transceiver in normal operation
’01’: Suspend mode, differential USB receiver switched off
’10’: Reserved, do not use this combination
’11’: USB transceiver switched off - full power down mode
Bit 8:
'1': Disable EPEC clock
Bit 7:
'1': Disable USB clock
Bit 6:
'1': Disable IOM-2 clock
Bit 3:
'1': Disable GPT12 clock
Bit 2:
'1': Disable SSC clock
Bit 1:
'1': Disable ASC clock
Bit 0:
'1': Disable RTC clock
'0': Enable EPEC clock
'0': Enable USB clock
'0': Enable IOM-2 clock
'0': Enable GPT12 clock
'0': Enable SSC clock
'0': Enable ASC clock
'0': Enable RTC clock