參數資料
型號: SAA7785
廠商: NXP Semiconductors N.V.
英文描述: ThunderBird Avenger(TM) PCI Audio Accelerator(雷鳥Avenger(TM)PCI音頻加速器)
中文描述: 雷鳥復仇者(商標)的PCI音頻加速器(雷鳥復仇者(商標)的PCI音頻加速器)
文件頁數: 52/68頁
文件大小: 1303K
代理商: SAA7785
ThunderBird Avenger
TM
PCI Audio
Accelerator
SAA7785
Philips Semiconductors
Preliminary Specification
1999
Nov 12
52
TABLE 42
Header Type Register - HEADER (RO)
TABLE 43
BIST Register - BIST (RO)
SSA7785 ThunderBird Avenger CFG Space 1 Legacy Base Address Registers
POR Value
0
0
0
0
0
0
0
0
Bit
Name
R/W
Function
7:0
LATIME
RO
The primary bus latency timer specifies the number of primary clocks that the
primary master may consume. It is set to zero since the joystick is a target
only.
PCI CFG 1
D7
D6
D5
D4
D3
D2
D1
D0
Offset 0Eh
MULTI_
FN
HEADER[6:0]
POR Value
1
0
0
0
0
0
0
0
Bit
Name
R/W
Function
7
MULTI_FN
RO
For the SSA7785 ThunderBird Avenger, function 1, this bit has no mean-
ing.
6:0
HEADER
RO
Header Type. A 00h indicates this device is not a PCI-to-PCI bridge.
PCI CFG 1
D7
D6
D5
D4
D3
D2
D1
D0
Offset 0Fh
BIST
START
R
R
CODE[3:0]
POR Value
0
0
0
0
0
0
0
0
Bit
Name
R/W
Function
7
BIST
RO
BIST capable. BIST is not supported in the SSA7785 ThunderBird
Avenger, function 1 at this revision.
6
START
RO
If BIST capable, this bit will start the BIST. Writing a 1 will start the test and
the BIST should write this bit to a zero when complete. Software should fail
the device if the BIST is not complete after 2 seconds.
5:4
R
RO
Reserved. These bits always return zero.
3:0
CODE
RO
Completion Code. A value of zero means the device has passed its test.
Non-zero values means the device has failed using device specific failure
codes.
PCI CFG 1
D7
D6
D5
D4
D3
D2
D1
D0
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