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參數(shù)資料
| 型號(hào)： | SAA7785 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | ThunderBird Avenger（TM） PCI Audio Accelerator(雷鳥Avenger（TM）PCI音頻加速器) |
| 中文描述： | 雷鳥復(fù)仇者（商標(biāo)）的PCI音頻加速器（雷鳥復(fù)仇者（商標(biāo)）的PCI音頻加速器） |
| 文件頁(yè)數(shù)： | 42/68頁(yè) |
| 文件大小： | 1303K |
| 代理商： | SAA7785 |
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ThunderBird Avenger
TM
PCI Audio
Accelerator
SAA7785
Philips Semiconductors
Preliminary Specification
1999
Nov 12
42
TABLE 23
ADLIB Base Address Register - ALBASE (RW/RO)
TABLE 24
Subsystem Vendor ID - SUBVENID (RO)
Bit
Name
R/W
Function
31:2
MDBASE
RW
MIDI port programmable base address. The address should be on a double word
boundary. For reference the MIDI port legacy base addresses are 220h, 230h,
240h, 250h, 300h, 320h, 330h, 332h, 334h, 336h, 340h, and 360h.
1
R
RO
Reserved. This bit is reserved a must always return a zero for plug and play.
0
IO
RO
I/O flag. This read only bit indicates that this is an I/O range.
PCI CFG 0
D31
D30
D29
D28
D27
D26
D25
D24
Offset 1Ch
ALBASE[31:24]
POR Value
0
0
0
0
0
0
0
0
D23
D22
D21
D20
D19
D18
D17
D16
ALBASE[23:16]
POR Value
0
0
0
0
0
0
0
0
D15
D14
D13
D12
D11
D10
D9
D8
ALBASE[15:8]
POR Value
0
0
0
0
0
0
0
0
D7
D6
D5
D4
D3
D2
D1
D0
ALBASE[7:3]
R
R
IO
POR Value
0
0
0
0
0
0
0
1
Bit
Name
R/W
Function
31:3
ALBASE
RW
AdLib registers programmable base address. The address should be on a quad
word (64 bit) boundary. For reference, the AdLib legacy base address is at 388h
and maps into a subset of the Sound Blaster registers.
2:1
R
RO
Reserved. These bits are reserved and always return zeros for plug and play.
0
IO
RO
I/O flag. This read only bit indicates that this is an I/O range.
PCI CFG 0
D15
D14
D13
D12
D11
D10
D9
D8
Offset 2Ch
SUBVEN_ID[15:8]
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