
1997 May 30
7
Philips Semiconductors
Preliminary specification
Car radio Digital Signal Processor (CDSP)
SAA7707H
SCL
SDA
EXCLK
38
39
40
I
serial clock input (I
2
C-bus)
serial data input/output (I
2
C-bus)
external reference clock input to generate 4f
as
and f
as
synchronization; to be
used if the I
2
S-bus inputs are not suitable
ground supply 8 for the digital circuitry
FM stereo indication (active HIGH)
FM pause detector/MSS detector (active HIGH); also for IAC trigger output
MUTE input pin (active LOW); only for FM mode
de-emphasis; CD and DCC (active HIGH) (I
2
S-bus)
DCC digital audio source clock input (I
2
S-bus)
DCC digital audio source Word Select input (I
2
S-bus)
DCC digital audio source left/right data input (I
2
S-bus)
positive supply 3 for the digital circuitry
ground supply 3 for the digital circuitry
ground supply 4 for the digital circuitry
positive supply 4 for the digital circuitry
positive supply 5 for the digital circuitry
ground supply 5 for the digital circuitry
ground supply 6 for the digital circuitry
positive supply 2 for the digital circuitry
test pin 1 (this pin should be left open-circuit)
ground supply 10 for the digital circuitry
test pin 2 (this pin should be left open-circuit)
radio data system bit clock input/output
radio data system data output
in FM mode, selects between FMMPX and RDSMPX input signal to the MPX
decimation filter
crystal oscillator input; can also be used as forced input in slave mode
crystal oscillator output
positive supply crystal circuitry
ground supply crystal circuitry
ground guards for ADCs
analog ground supply for ADCs
analog positive supply for ADCs
common mode reference voltage input for MPX ADC and buffers
analog input for auxiliary left signal
analog input for auxiliary right signal
analog input for tape left signal
analog input for tape right signal
analog input for AM audio frequency
analog input for FM multiplex signal
I/O
I
V
SSD8
STEREO
MSS/P
MUTE
DEEM
DCCCLK
DCCWS
DCCDAT
V
DDD3
V
SSD3
V
SSD4
V
DDD4
V
DDD5
V
SSD5
V
SSD6
V
DDD2
TEST1
V
SSD10
TEST2
RDSCLK
RDSDAT
MPXRDS
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
I
I
I
I
I/O
O
I
XTALI
XTALO
V
DDX
V
SSX
V
SSG
V
SSA1
V
DDA1
V
refMPX
AUXL
AUXR
TAPEL
TAPER
AMAF
FMMPX
63
64
65
66
67
68
69
70
71
72
73
74
75
76
I
O
I
I
I
I
I
I
I
SYMBOL
PIN
I/O
DESCRIPTION